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| author | Piotr Dymacz <pepe2k@gmail.com> | 2020-09-06 09:52:43 +0200 |
|---|---|---|
| committer | Piotr Dymacz <pepe2k@gmail.com> | 2020-09-28 01:28:37 +0200 |
| commit | c65c306d336418f3b6519693d892148f6e2eb38e (patch) | |
| tree | 68aee8b3ab90159b5b709071c8ccc28b506b2771 /target/linux/ath79/dts/ar9344_tplink_cpe210-v1.dts | |
| parent | 77598f19cc08a421f927979b3e85f7f18b8f9648 (diff) | |
| download | upstream-c65c306d336418f3b6519693d892148f6e2eb38e.tar.gz upstream-c65c306d336418f3b6519693d892148f6e2eb38e.tar.bz2 upstream-c65c306d336418f3b6519693d892148f6e2eb38e.zip | |
ath79: add support for Wallys DR531
Wallys DR531 is based on Qualcomm Atheros QCA9531 v2. Support for this
device was first introduced in e767980eb8 (ar71xx target).
Specifications:
- Qualcomm/Atheros QCA9531 v2
- 550/400/200 MHz (CPU/DDR/AHB)
- 2x 10/100 Mbps Ethernet
- 64 MB of RAM (DDR2)
- 8 MB of flash (SPI NOR)
- 2T2R 2.4 GHz Wi-Fi, with external PA (SE2576L), up to 30 dBm
- 2x MMCX connectors (optional IPEX/U.FL)
- mini PCIe connector (PCIe/USB buses and mini SIM slot)
- 7x LED, 1x button, 1x optional buzzer
- UART, JTAG and LED headers on PCB
Flash instruction (do it under U-Boot, using UART):
tftpb 0x80060000 openwrt-ath79-...-dr531-squashfs-sysupgrade.bin
erase 0x9f050000 +$filesize
cp.b $fileaddr 0x9f050000 $filesize
setenv bootcmd "bootm 0x9f050000"
saveenv && reset
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
Diffstat (limited to 'target/linux/ath79/dts/ar9344_tplink_cpe210-v1.dts')
0 files changed, 0 insertions, 0 deletions