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authorPiotr Dymacz <pepe2k@gmail.com>2019-11-12 22:36:28 +0100
committerPiotr Dymacz <pepe2k@gmail.com>2019-11-25 17:32:46 +0100
commite5d4c0966736287c7ade29c5ccaf6f1ad841b7db (patch)
treec885756e02cf38a017a058d4ccd88f4dec54aa9a /target/linux/ath79/dts
parent8016f648640e8f73f0dc4fc307fb6bebd12afb88 (diff)
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ath79: add support for YunCore XD4200 and A782
YunCore XD4200 ('XD4200_W6.0' marking on PCB) is Qualcomm/Atheros based (QCA9563, QCA9886, QCA8334) dual-band, Wave-2 AC1200 ceiling AP with PoE (802.3at) support. A782 model ('T750_V5.1' marking on PCB) is a smaller version of the XD4200, with similar specification but lower TX power. Specification: - QCA9563 (775 MHz) - 128 MB of RAM (DDR2) - 16 MB of FLASH (SPI NOR) - 2x 10/100/1000 Mbps Ethernet (QCA8334), with 802.3at PoE support (WAN) - Wi-Fi 2.4 GHz: - XD4200: 2T2R (QCA9563), with ext. PA (SKY65174-21) and LNA - A782: 2T2R (QCA9563), with ext. FEM (SKY85329-11) - Wi-Fi 5 GHz: - XD4200: 2T2R (QCA9886), with ext. FEM (SKY85728-11) - A782: 2T2R (QCA9886), with ext. FEM (SKY85735-11) - LEDs: - XD4200: 5x (2x driven by SOC, 1x driven by AC radio, 2x Ethernet) - A782: 3x (1x RGB, driven by SOC and radio, 2x Ethernet) - 1x button (reset) - 1x UART (4-pin, 2.54 mm pitch) header on PCB - 1x DC jack (12 V) Flash instructions: If your device comes with generic QSDK based firmware, you can login over telnet (login: root, empty password, default IP: 192.168.188.253), issue first (important!) 'fw_setenv' command and then perform regular upgrade, using 'sysupgrade -n -F ...' (you can use 'wget' to download image to the device, SSH server is not available): fw_setenv bootcmd "bootm 0x9f050000 || bootm 0x9fe80000" sysupgrade -n -F openwrt-...-yuncore_...-squashfs-sysupgrade.bin In case your device runs firmware with YunCore custom GUI, you can use U-Boot recovery mode: 1. Set a static IP 192.168.0.141/24 on PC and start TFTP server with 'tftp' image renamed to 'upgrade.bin' 2. Power the device with reset button pressed and release it after 5-7 seconds, recovery mode should start downloading image from server (unfortunately, there is no visible indication that recovery got enabled - in case of problems check TFTP server logs) Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
Diffstat (limited to 'target/linux/ath79/dts')
-rw-r--r--target/linux/ath79/dts/qca9563_yuncore_a782.dts32
-rw-r--r--target/linux/ath79/dts/qca9563_yuncore_xd4200.dts32
-rw-r--r--target/linux/ath79/dts/qca9563_yuncore_xd4200.dtsi122
3 files changed, 186 insertions, 0 deletions
diff --git a/target/linux/ath79/dts/qca9563_yuncore_a782.dts b/target/linux/ath79/dts/qca9563_yuncore_a782.dts
new file mode 100644
index 0000000000..27360bbe9c
--- /dev/null
+++ b/target/linux/ath79/dts/qca9563_yuncore_a782.dts
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/dts-v1/;
+
+#include "qca9563_yuncore_xd4200.dtsi"
+
+/ {
+ compatible = "yuncore,a782", "qca,qca9563";
+ model = "YunCore A782";
+
+ aliases {
+ led-boot = &led_system;
+ led-failsafe = &led_system;
+ led-running = &led_system;
+ led-upgrade = &led_system;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led_system: system {
+ label = "a782:red:system";
+ gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
+ default-state = "keep";
+ };
+
+ wlan2g {
+ label = "a782:green:wlan2g";
+ gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "phy1tpt";
+ };
+ };
+};
diff --git a/target/linux/ath79/dts/qca9563_yuncore_xd4200.dts b/target/linux/ath79/dts/qca9563_yuncore_xd4200.dts
new file mode 100644
index 0000000000..ab8d855884
--- /dev/null
+++ b/target/linux/ath79/dts/qca9563_yuncore_xd4200.dts
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/dts-v1/;
+
+#include "qca9563_yuncore_xd4200.dtsi"
+
+/ {
+ compatible = "yuncore,xd4200", "qca,qca9563";
+ model = "YunCore XD4200";
+
+ aliases {
+ led-boot = &led_system;
+ led-failsafe = &led_system;
+ led-running = &led_system;
+ led-upgrade = &led_system;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led_system: system {
+ label = "xd4200:blue:system";
+ gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
+ default-state = "keep";
+ };
+
+ wlan2g {
+ label = "xd4200:blue:wlan2g";
+ gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "phy1tpt";
+ };
+ };
+};
diff --git a/target/linux/ath79/dts/qca9563_yuncore_xd4200.dtsi b/target/linux/ath79/dts/qca9563_yuncore_xd4200.dtsi
new file mode 100644
index 0000000000..2f7964de90
--- /dev/null
+++ b/target/linux/ath79/dts/qca9563_yuncore_xd4200.dtsi
@@ -0,0 +1,122 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+#include "qca956x.dtsi"
+
+/ {
+ aliases {
+ label-mac-device = &eth0;
+ };
+
+ chosen {
+ bootargs = "console=ttyS0,115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys";
+
+ reset {
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
+ debounce-interval = <60>;
+ };
+ };
+};
+
+&eth0 {
+ status = "okay";
+
+ pll-data = <0x03000101 0x00000101 0x00001919>;
+
+ mtd-mac-address = <&art 0x0>;
+ phy-mode = "sgmii";
+ phy-handle = <&phy0>;
+};
+
+&gpio {
+ status = "okay";
+};
+
+&mdio0 {
+ status = "okay";
+
+ phy-mask = <0>;
+
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ phy-mode = "sgmii";
+
+ qca,ar8327-initvals = <
+ 0x04 0x00080080 /* PORT0 PAD MODE CTRL */
+ 0x10 0x81000080 /* POWER_ON_STRIP */
+ 0x50 0xcf37cf37 /* LED_CTRL0 */
+ 0x54 0xcf37cf37 /* LED_CTRL1 */
+ 0x58 0xcf37cf37 /* LED_CTRL2 */
+ 0x5c 0x0000c300 /* LED_CTRL3 */
+ 0x7c 0x0000007e /* PORT0_STATUS */
+ >;
+ };
+};
+
+&pcie {
+ status = "okay";
+
+ wifi@0,0 {
+ compatible = "pci168c,0056";
+ reg = <0x0000 0 0 0 0>;
+ };
+};
+
+&spi {
+ status = "okay";
+
+ num-cs = <1>;
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <25000000>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "u-boot";
+ reg = <0x000000 0x040000>;
+ read-only;
+ };
+
+ partition@40000 {
+ label = "u-boot-env";
+ reg = <0x040000 0x010000>;
+ };
+
+ partition@50000 {
+ compatible = "denx,uimage";
+ label = "firmware";
+ reg = <0x050000 0xfa0000>;
+ };
+
+ art: partition@ff0000 {
+ label = "art";
+ reg = <0xff0000 0x010000>;
+ read-only;
+ };
+ };
+ };
+};
+
+&uart {
+ status = "okay";
+};
+
+&wmac {
+ status = "okay";
+
+ mtd-cal-data = <&art 0x1000>;
+};