aboutsummaryrefslogtreecommitdiffstats
path: root/target/linux/ath79/image/lzma-loader/src/cache.c
diff options
context:
space:
mode:
authorJohn Crispin <john@phrozen.org>2018-05-24 16:53:10 +0200
committerJohn Crispin <john@phrozen.org>2018-05-24 17:24:31 +0200
commit76ba98d9b0b6e06bb7e843207654223cb62518d6 (patch)
tree34fec623c4450216119aacf6b038bd3bc1742a69 /target/linux/ath79/image/lzma-loader/src/cache.c
parent45456fe0c8af2274ccf5db57942a8009a841fac3 (diff)
downloadupstream-76ba98d9b0b6e06bb7e843207654223cb62518d6.tar.gz
upstream-76ba98d9b0b6e06bb7e843207654223cb62518d6.tar.bz2
upstream-76ba98d9b0b6e06bb7e843207654223cb62518d6.zip
ath79: drop, its not ready for a release yet
Signed-off-by: John Crispin <john@phrozen.org>
Diffstat (limited to 'target/linux/ath79/image/lzma-loader/src/cache.c')
-rw-r--r--target/linux/ath79/image/lzma-loader/src/cache.c43
1 files changed, 0 insertions, 43 deletions
diff --git a/target/linux/ath79/image/lzma-loader/src/cache.c b/target/linux/ath79/image/lzma-loader/src/cache.c
deleted file mode 100644
index 28cc848333..0000000000
--- a/target/linux/ath79/image/lzma-loader/src/cache.c
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * LZMA compressed kernel loader for Atheros AR7XXX/AR9XXX based boards
- *
- * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
- *
- * The cache manipulation routine has been taken from the U-Boot project.
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- *
- */
-
-#include "cache.h"
-#include "cacheops.h"
-#include "config.h"
-
-#define cache_op(op,addr) \
- __asm__ __volatile__( \
- " .set push \n" \
- " .set noreorder \n" \
- " .set mips3\n\t \n" \
- " cache %0, %1 \n" \
- " .set pop \n" \
- : \
- : "i" (op), "R" (*(unsigned char *)(addr)))
-
-void flush_cache(unsigned long start_addr, unsigned long size)
-{
- unsigned long lsize = CONFIG_CACHELINE_SIZE;
- unsigned long addr = start_addr & ~(lsize - 1);
- unsigned long aend = (start_addr + size - 1) & ~(lsize - 1);
-
- while (1) {
- cache_op(Hit_Writeback_Inv_D, addr);
- cache_op(Hit_Invalidate_I, addr);
- if (addr == aend)
- break;
- addr += lsize;
- }
-}