brcm2708: rename target to bcm27xx

This change makes the names of Broadcom targets consistent by using
the common notation based on SoC/CPU ID (which is used internally
anyway), bcmXXXX instead of brcmXXXX.
This is even used for target TITLE in make menuconfig already,
only the short target name used brcm so far.

Despite, since subtargets range from bcm2708 to bcm2711, it seems
appropriate to use bcm27xx instead of bcm2708 (again, as already done
for BOARDNAME).

This also renames the packages brcm2708-userland and brcm2708-gpu-fw.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Acked-by: Álvaro Fernández Rojas <noltari@gmail.com>

1 files changed, 91 insertions, 0 deletions

diff --git a/target/linux/bcm27xx/patches-4.19/950-0715-clk-bcm2835-Add-BCM2711_CLOCK_EMMC2-support.patch b/target/linux/bcm27xx/patches-4.19/950-0715-clk-bcm2835-Add-BCM2711_CLOCK_EMMC2-support.patch
new file mode 100644
index 0000000000..8d4b7c9e0b
--- /dev/null
+++ b/target/linux/bcm27xx/patches-4.19/950-0715-clk-bcm2835-Add-BCM2711_CLOCK_EMMC2-support.patch
@@ -0,0 +1,91 @@
+From b4c6046e1c55ddf211215191be9ea6316238889b Mon Sep 17 00:00:00 2001
+From: Stefan Wahren <wahrenst@gmx.net>
+Date: Fri, 20 Sep 2019 07:27:03 +0200
+Subject: [PATCH] clk: bcm2835: Add BCM2711_CLOCK_EMMC2 support
+
+commit 42de9ad400afadd41ee027b5feef234a2d2918b9 upstream.
+
+The new BCM2711 supports an additional clock for the emmc2 block.
+So add a new compatible and register this clock only for BCM2711.
+
+Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
+Reviewed-by: Matthias Brugger <mbrugger@suse.com>
+Acked-by: Eric Anholt <eric@anholt.net>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+---
+ arch/arm/boot/dts/bcm2838.dtsi      |  1 +
+ drivers/clk/bcm/clk-bcm2835.c       | 20 +++++++++++++++++++-
+ include/dt-bindings/clock/bcm2835.h |  2 ++
+ 3 files changed, 22 insertions(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/bcm2838.dtsi
++++ b/arch/arm/boot/dts/bcm2838.dtsi
+@@ -210,7 +210,7 @@
+ 			compatible = "brcm,bcm2711-emmc2";
+ 			status = "okay";
+ 			interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&clocks BCM2838_CLOCK_EMMC2>;
++			clocks = <&clocks BCM2711_CLOCK_EMMC2>;
+ 			reg = <0x7e340000 0x100>;
+ 		};
+ 
+--- a/drivers/clk/bcm/clk-bcm2835.c
++++ b/drivers/clk/bcm/clk-bcm2835.c
+@@ -124,6 +124,8 @@
+ #define CM_AVEODIV		0x1bc
+ #define CM_EMMCCTL		0x1c0
+ #define CM_EMMCDIV		0x1c4
++#define CM_EMMC2CTL		0x1d0
++#define CM_EMMC2DIV		0x1d4
+ 
+ /* General bits for the CM_*CTL regs */
+ # define CM_ENABLE			BIT(4)
+@@ -302,7 +304,8 @@
+ #define VCMSG_ID_CORE_CLOCK     4
+ 
+ #define SOC_BCM2835		BIT(0)
+-#define SOC_ALL			(SOC_BCM2835)
++#define SOC_BCM2711		BIT(1)
++#define SOC_ALL			(SOC_BCM2835 | SOC_BCM2711)
+ 
+ /*
+  * Names of clocks used within the driver that need to be replaced
+@@ -2102,6 +2105,16 @@ static const struct bcm2835_clk_desc clk
+ 		.frac_bits = 8,
+ 		.tcnt_mux = 39),
+ 
++	/* EMMC2 clock (only available for BCM2711) */
++	[BCM2711_CLOCK_EMMC2]	= REGISTER_PER_CLK(
++		SOC_BCM2711,
++		.name = "emmc2",
++		.ctl_reg = CM_EMMC2CTL,
++		.div_reg = CM_EMMC2DIV,
++		.int_bits = 4,
++		.frac_bits = 8,
++		.tcnt_mux = 42),
++
+ 	/* General purpose (GPIO) clocks */
+ 	[BCM2835_CLOCK_GP0]	= REGISTER_PER_CLK(
+ 		SOC_ALL,
+@@ -2376,8 +2389,13 @@ static const struct cprman_plat_data cpr
+ 	.soc = SOC_BCM2835,
+ };
+ 
++static const struct cprman_plat_data cprman_bcm2711_plat_data = {
++	.soc = SOC_BCM2711,
++};
++
+ static const struct of_device_id bcm2835_clk_of_match[] = {
+ 	{ .compatible = "brcm,bcm2835-cprman", .data = &cprman_bcm2835_plat_data },
++	{ .compatible = "brcm,bcm2711-cprman", .data = &cprman_bcm2711_plat_data },
+ 	{}
+ };
+ MODULE_DEVICE_TABLE(of, bcm2835_clk_of_match);
+--- a/include/dt-bindings/clock/bcm2835.h
++++ b/include/dt-bindings/clock/bcm2835.h
+@@ -66,3 +66,5 @@
+ #define BCM2835_CLOCK_DSI1E		48
+ #define BCM2835_CLOCK_DSI0P		49
+ #define BCM2835_CLOCK_DSI1P		50
++
++#define BCM2711_CLOCK_EMMC2		51