bcm27xx: import latest patches from the RPi foundation

bcm2708: boot tested on RPi B+ v1.2
bcm2709: boot tested on RPi 3B v1.2 and RPi 4B v1.1 4G
bcm2710: boot tested on RPi 3B v1.2
bcm2711: boot tested on RPi 4B v1.1 4G

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>

1 files changed, 98 insertions, 0 deletions

diff --git a/target/linux/bcm27xx/patches-5.4/950-0540-drm-vc4-plane-Improve-LBM-usage.patch b/target/linux/bcm27xx/patches-5.4/950-0540-drm-vc4-plane-Improve-LBM-usage.patch
new file mode 100644
index 0000000000..5342e0ad23
--- /dev/null
+++ b/target/linux/bcm27xx/patches-5.4/950-0540-drm-vc4-plane-Improve-LBM-usage.patch
@@ -0,0 +1,98 @@
+From 81072e19a85bfa3f80c23acdff6156522d945efa Mon Sep 17 00:00:00 2001
+From: Dave Stevenson <dave.stevenson@raspberrypi.com>
+Date: Tue, 11 Feb 2020 16:55:02 +0000
+Subject: [PATCH] drm/vc4: plane: Improve LBM usage
+
+LBM allocations were always taking the worst case sizing of
+max(src_width, dst_width) * 16. This is significantly over
+the required sizing, and stops us rendering multiple 4k images
+to the screen.
+
+Add some of the additional constraints to more accurately
+describe the LBM requirements.
+
+Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
+Signed-off-by: Maxime Ripard <maxime@cerno.tech>
+---
+ drivers/gpu/drm/vc4/vc4_plane.c | 31 ++++++++++++++++++++-----------
+ 1 file changed, 20 insertions(+), 11 deletions(-)
+
+--- a/drivers/gpu/drm/vc4/vc4_plane.c
++++ b/drivers/gpu/drm/vc4/vc4_plane.c
+@@ -142,9 +142,10 @@ static const struct hvs_format *vc4_get_
+ 	return NULL;
+ }
+ 
+-static enum vc4_scaling_mode vc4_get_scaling_mode(u32 src, u32 dst)
++static enum vc4_scaling_mode vc4_get_scaling_mode(u32 src, u32 dst,
++						  bool chroma_vrep)
+ {
+-	if (dst == src)
++	if (dst == src && !chroma_vrep)
+ 		return VC4_SCALING_NONE;
+ 	if (3 * dst >= 2 * src)
+ 		return VC4_SCALING_PPF;
+@@ -377,9 +378,11 @@ static int vc4_plane_setup_clipping_and_
+ 		return ret;
+ 
+ 	vc4_state->x_scaling[0] = vc4_get_scaling_mode(vc4_state->src_w[0],
+-						       vc4_state->crtc_w);
++						       vc4_state->crtc_w,
++						       false);
+ 	vc4_state->y_scaling[0] = vc4_get_scaling_mode(vc4_state->src_h[0],
+-						       vc4_state->crtc_h);
++						       vc4_state->crtc_h,
++						       false);
+ 
+ 	vc4_state->is_unity = (vc4_state->x_scaling[0] == VC4_SCALING_NONE &&
+ 			       vc4_state->y_scaling[0] == VC4_SCALING_NONE);
+@@ -392,10 +395,12 @@ static int vc4_plane_setup_clipping_and_
+ 
+ 		vc4_state->x_scaling[1] =
+ 			vc4_get_scaling_mode(vc4_state->src_w[1],
+-					     vc4_state->crtc_w);
++					     vc4_state->crtc_w,
++					     v_subsample == 2);
+ 		vc4_state->y_scaling[1] =
+ 			vc4_get_scaling_mode(vc4_state->src_h[1],
+-					     vc4_state->crtc_h);
++					     vc4_state->crtc_h,
++					     v_subsample == 2);
+ 
+ 		/* YUV conversion requires that horizontal scaling be enabled
+ 		 * on the UV plane even if vc4_get_scaling_mode() returned
+@@ -445,10 +450,7 @@ static void vc4_write_ppf(struct vc4_pla
+ static u32 vc4_lbm_size(struct drm_plane_state *state)
+ {
+ 	struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
+-	/* This is the worst case number.  One of the two sizes will
+-	 * be used depending on the scaling configuration.
+-	 */
+-	u32 pix_per_line = max(vc4_state->src_w[0], (u32)vc4_state->crtc_w);
++	u32 pix_per_line;
+ 	u32 lbm;
+ 
+ 	/* LBM is not needed when there's no vertical scaling. */
+@@ -456,6 +458,11 @@ static u32 vc4_lbm_size(struct drm_plane
+ 	    vc4_state->y_scaling[1] == VC4_SCALING_NONE)
+ 		return 0;
+ 
++	if (vc4_state->x_scaling[0] == VC4_SCALING_TPZ)
++		pix_per_line = vc4_state->crtc_w;
++	else
++		pix_per_line = vc4_state->src_w[0];
++
+ 	if (!vc4_state->is_yuv) {
+ 		if (vc4_state->y_scaling[0] == VC4_SCALING_TPZ)
+ 			lbm = pix_per_line * 8;
+@@ -591,7 +598,9 @@ static int vc4_plane_allocate_lbm(struct
+ 		spin_lock_irqsave(&vc4->hvs->mm_lock, irqflags);
+ 		ret = drm_mm_insert_node_generic(&vc4->hvs->lbm_mm,
+ 						 &vc4_state->lbm,
+-						 lbm_size, 32, 0, 0);
++						 lbm_size,
++						 vc4->hvs->hvs5 ? 64 : 32,
++						 0, 0);
+ 		spin_unlock_irqrestore(&vc4->hvs->mm_lock, irqflags);
+ 
+ 		if (ret)