bcm27xx: import latest patches from the RPi foundation

bcm2708: boot tested on RPi B+ v1.2
bcm2709: boot tested on RPi 3B v1.2 and RPi 4B v1.1 4G
bcm2710: boot tested on RPi 3B v1.2
bcm2711: boot tested on RPi 4B v1.1 4G

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>

1 files changed, 696 insertions, 0 deletions

diff --git a/target/linux/bcm27xx/patches-5.4/950-0867-ARM-dts-Make-bcm2711-dts-more-like-5.7.patch b/target/linux/bcm27xx/patches-5.4/950-0867-ARM-dts-Make-bcm2711-dts-more-like-5.7.patch
new file mode 100644
index 0000000000..bbe5569e61
--- /dev/null
+++ b/target/linux/bcm27xx/patches-5.4/950-0867-ARM-dts-Make-bcm2711-dts-more-like-5.7.patch
@@ -0,0 +1,696 @@
+From 0f02c32b2d27fa5f0b21c67fb5518a36b5234f3a Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.com>
+Date: Tue, 7 Jul 2020 09:01:54 +0100
+Subject: [PATCH] ARM: dts: Make bcm2711 dts more like 5.7
+
+The multiple declarations of pixelvalve2 were causing problems for the
+DT checkers. Aligning the dts files closer to the later kernel versions
+avoids some repetition and should make maintenance easier.
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.com>
+---
+ arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 142 ++++++++++++-----------
+ arch/arm/boot/dts/bcm2711-rpi-cm4.dts |  69 +----------
+ arch/arm/boot/dts/bcm2711-rpi.dtsi    | 150 +++++++++++++++++++++++-
+ arch/arm/boot/dts/bcm2711.dtsi        | 157 +++-----------------------
+ 4 files changed, 245 insertions(+), 273 deletions(-)
+
+--- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
++++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
+@@ -19,7 +19,9 @@
+ 	};
+ 
+ 	aliases {
++		emmc2bus = &emmc2bus;
+ 		ethernet0 = &genet;
++		pcie0 = &pcie0;
+ 	};
+ 
+ 	leds {
+@@ -30,6 +32,8 @@
+ 		pwr {
+ 			label = "PWR";
+ 			gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
++			default-state = "keep";
++			linux,default-trigger = "default-on";
+ 		};
+ 	};
+ 
+@@ -70,6 +74,79 @@
+ 	};
+ };
+ 
++&gpio {
++	/*
++	 * Parts taken from rpi_SCH_4b_4p0_reduced.pdf and
++	 * the official GPU firmware DT blob.
++	 *
++	 * Legend:
++	 * "FOO" = GPIO line named "FOO" on the schematic
++	 * "FOO_N" = GPIO line named "FOO" on schematic, active low
++	 */
++	gpio-line-names = "ID_SDA",
++			  "ID_SCL",
++			  "SDA1",
++			  "SCL1",
++			  "GPIO_GCLK",
++			  "GPIO5",
++			  "GPIO6",
++			  "SPI_CE1_N",
++			  "SPI_CE0_N",
++			  "SPI_MISO",
++			  "SPI_MOSI",
++			  "SPI_SCLK",
++			  "GPIO12",
++			  "GPIO13",
++			  /* Serial port */
++			  "TXD1",
++			  "RXD1",
++			  "GPIO16",
++			  "GPIO17",
++			  "GPIO18",
++			  "GPIO19",
++			  "GPIO20",
++			  "GPIO21",
++			  "GPIO22",
++			  "GPIO23",
++			  "GPIO24",
++			  "GPIO25",
++			  "GPIO26",
++			  "GPIO27",
++			  "RGMII_MDIO",
++			  "RGMIO_MDC",
++			  /* Used by BT module */
++			  "CTS0",
++			  "RTS0",
++			  "TXD0",
++			  "RXD0",
++			  /* Used by Wifi */
++			  "SD1_CLK",
++			  "SD1_CMD",
++			  "SD1_DATA0",
++			  "SD1_DATA1",
++			  "SD1_DATA2",
++			  "SD1_DATA3",
++			  /* Shared with SPI flash */
++			  "PWM0_MISO",
++			  "PWM1_MOSI",
++			  "STATUS_LED_G_CLK",
++			  "SPIFLASH_CE_N",
++			  "SDA0",
++			  "SCL0",
++			  "RGMII_RXCLK",
++			  "RGMII_RXCTL",
++			  "RGMII_RXD0",
++			  "RGMII_RXD1",
++			  "RGMII_RXD2",
++			  "RGMII_RXD3",
++			  "RGMII_TXCLK",
++			  "RGMII_TXCTL",
++			  "RGMII_TXD0",
++			  "RGMII_TXD1",
++			  "RGMII_TXD2",
++			  "RGMII_TXD3";
++};
++
+ &pwm1 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>;
+@@ -138,46 +215,6 @@
+ 	interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ 
+-&vc4 {
+-	status = "okay";
+-};
+-
+-&pixelvalve0 {
+-	status = "okay";
+-};
+-
+-&pixelvalve1 {
+-	status = "okay";
+-};
+-
+-&pixelvalve2 {
+-	status = "okay";
+-};
+-
+-&pixelvalve3 {
+-	status = "okay";
+-};
+-
+-&pixelvalve4 {
+-	status = "okay";
+-};
+-
+-&hdmi0 {
+-	status = "okay";
+-};
+-
+-&ddc0 {
+-	status = "okay";
+-};
+-
+-&hdmi1 {
+-	status = "okay";
+-};
+-
+-&ddc1 {
+-	status = "okay";
+-};
+-
+ // =============================================
+ // Downstream rpi- changes
+ 
+@@ -195,8 +232,6 @@
+ #include "bcm283x-rpi-csi1-2lane.dtsi"
+ #include "bcm283x-rpi-i2c0mux_0_44.dtsi"
+ 
+-/delete-node/ &emmc2;
+-
+ / {
+ 	chosen {
+ 		bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1 snd_bcm2835.enable_headphones=1";
+@@ -213,29 +248,7 @@
+ 		i2c4 = &i2c4;
+ 		i2c5 = &i2c5;
+ 		i2c6 = &i2c6;
+-		/delete-property/ ethernet;
+ 		/delete-property/ intc;
+-		pcie0 = &pcie0;
+-		emmc2bus = &emmc2bus;
+-	};
+-
+-	emmc2bus: emmc2bus {
+-		compatible = "simple-bus";
+-		#address-cells = <2>;
+-		#size-cells = <1>;
+-
+-		ranges = <0x0 0x7e000000  0x0 0xfe000000  0x01800000>;
+-		dma-ranges = <0x0 0xc0000000  0x0 0x00000000  0x40000000>;
+-
+-		emmc2: emmc2@7e340000 {
+-			compatible = "brcm,bcm2711-emmc2";
+-			status = "okay";
+-			interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&clocks BCM2711_CLOCK_EMMC2>;
+-			reg = <0x0 0x7e340000 0x100>;
+-			vqmmc-supply = <&sd_io_1v8_reg>;
+-			broken-cd;
+-		};
+ 	};
+ 
+ 	/delete-node/ wifi-pwrseq;
+@@ -557,6 +570,7 @@
+ 		eth_led0 = <&phy1>,"led-modes:0";
+ 		eth_led1 = <&phy1>,"led-modes:4";
+ 
++		sd_poll_once = <&emmc2>, "non-removable?";
+ 		spi_dma4 = <&spi0>, "dmas:0=", <&dma40>,
+ 			   <&spi0>, "dmas:8=", <&dma40>;
+ 	};
+--- a/arch/arm/boot/dts/bcm2711-rpi-cm4.dts
++++ b/arch/arm/boot/dts/bcm2711-rpi-cm4.dts
+@@ -19,7 +19,9 @@
+ 	};
+ 
+ 	aliases {
++		emmc2bus = &emmc2bus;
+ 		ethernet0 = &genet;
++		pcie0 = &pcie0;
+ 	};
+ 
+ 	leds {
+@@ -30,6 +32,8 @@
+ 		pwr {
+ 			label = "PWR";
+ 			gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
++			default-state = "keep";
++			linux,default-trigger = "default-on";
+ 		};
+ 	};
+ 
+@@ -150,46 +154,6 @@
+ 	interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ 
+-&vc4 {
+-	status = "okay";
+-};
+-
+-&pixelvalve0 {
+-	status = "okay";
+-};
+-
+-&pixelvalve1 {
+-	status = "okay";
+-};
+-
+-&pixelvalve2 {
+-	status = "okay";
+-};
+-
+-&pixelvalve3 {
+-	status = "okay";
+-};
+-
+-&pixelvalve4 {
+-	status = "okay";
+-};
+-
+-&hdmi0 {
+-	status = "okay";
+-};
+-
+-&ddc0 {
+-	status = "okay";
+-};
+-
+-&hdmi1 {
+-	status = "okay";
+-};
+-
+-&ddc1 {
+-	status = "okay";
+-};
+-
+ // =============================================
+ // Downstream rpi- changes
+ 
+@@ -208,8 +172,6 @@
+ #include "bcm283x-rpi-csi1-4lane.dtsi"
+ #include "bcm283x-rpi-i2c0mux_0_44.dtsi"
+ 
+-/delete-node/ &emmc2;
+-
+ / {
+ 	chosen {
+ 		bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1 snd_bcm2835.enable_headphones=1";
+@@ -226,29 +188,7 @@
+ 		i2c4 = &i2c4;
+ 		i2c5 = &i2c5;
+ 		i2c6 = &i2c6;
+-		/delete-property/ ethernet;
+ 		/delete-property/ intc;
+-		pcie0 = &pcie0;
+-		emmc2bus = &emmc2bus;
+-	};
+-
+-	emmc2bus: emmc2bus {
+-		compatible = "simple-bus";
+-		#address-cells = <2>;
+-		#size-cells = <1>;
+-
+-		ranges = <0x0 0x7e000000  0x0 0xfe000000  0x01800000>;
+-		dma-ranges = <0x0 0xc0000000  0x0 0x00000000  0x40000000>;
+-
+-		emmc2: emmc2@7e340000 {
+-			compatible = "brcm,bcm2711-emmc2";
+-			status = "okay";
+-			interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&clocks BCM2711_CLOCK_EMMC2>;
+-			reg = <0x0 0x7e340000 0x100>;
+-			vqmmc-supply = <&sd_io_1v8_reg>;
+-			broken-cd;
+-		};
+ 	};
+ 
+ 	/delete-node/ wifi-pwrseq;
+@@ -588,6 +528,7 @@
+ 			<&ant2>, "output-high?=off",
+ 			<&ant2>, "output-low?=on";
+ 
++		sd_poll_once = <&emmc2>, "non-removable?";
+ 		spi_dma4 = <&spi0>, "dmas:0=", <&dma40>,
+ 			   <&spi0>, "dmas:8=", <&dma40>;
+ 	};
+--- a/arch/arm/boot/dts/bcm2711-rpi.dtsi
++++ b/arch/arm/boot/dts/bcm2711-rpi.dtsi
+@@ -4,6 +4,129 @@
+ / {
+ 	soc {
+ 		/delete-node/ v3d@7ec00000;
++
++		pixelvalve0: pixelvalve@7e206000 {
++			compatible = "brcm,bcm2711-pixelvalve0";
++			reg = <0x7e206000 0x100>;
++			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
++			status = "disabled";
++		};
++
++		pixelvalve1: pixelvalve@7e207000 {
++			compatible = "brcm,bcm2711-pixelvalve1";
++			reg = <0x7e207000 0x100>;
++			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
++			status = "disabled";
++		};
++
++		pixelvalve2: pixelvalve@7e20a000 {
++			compatible = "brcm,bcm2711-pixelvalve2";
++			reg = <0x7e20a000 0x100>;
++			interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
++			status = "disabled";
++		};
++
++		pixelvalve4: pixelvalve@7e216000 {
++			compatible = "brcm,bcm2711-pixelvalve4";
++			reg = <0x7e216000 0x100>;
++			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
++			status = "disabled";
++		};
++
++		pixelvalve3: pixelvalve@7ec12000 {
++			compatible = "brcm,bcm2711-pixelvalve3";
++			reg = <0x7ec12000 0x100>;
++			interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
++			status = "disabled";
++		};
++
++		dvp: clock@7ef00000 {
++			compatible = "brcm,brcm2711-dvp";
++			reg = <0x7ef00000 0x10>;
++			clocks = <&clk_108MHz>;
++			#clock-cells = <1>;
++			#reset-cells = <1>;
++		};
++
++		hdmi0: hdmi@7ef00700 {
++			compatible = "brcm,bcm2711-hdmi0";
++			reg = <0x7ef00700 0x300>,
++			      <0x7ef00300 0x200>,
++			      <0x7ef00f00 0x80>,
++			      <0x7ef00f80 0x80>,
++			      <0x7ef01b00 0x200>,
++			      <0x7ef01f00 0x400>,
++			      <0x7ef00200 0x80>,
++			      <0x7ef04300 0x100>,
++			      <0x7ef20000 0x100>,
++			      <0x7ef00100 0x30>;
++			reg-names = "hdmi",
++				    "dvp",
++				    "phy",
++				    "rm",
++				    "packet",
++				    "metadata",
++				    "csc",
++				    "cec",
++				    "hd",
++				    "intr2";
++			clocks = <&firmware_clocks 13>;
++			clock-names = "hdmi";
++			resets = <&dvp 0>;
++			ddc = <&ddc0>;
++			dmas = <&dma 10>;
++			dma-names = "audio-rx";
++			interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
++			status = "disabled";
++		};
++
++		ddc0: i2c@7ef04500 {
++			compatible = "brcm,bcm2711-hdmi-i2c";
++			reg = <0x7ef04500 0x100>, <0x7ef00b00 0x300>;
++			reg-names = "bsc", "auto-i2c";
++			clock-frequency = <97500>;
++			status = "disabled";
++		};
++
++		hdmi1: hdmi@7ef05700 {
++			compatible = "brcm,bcm2711-hdmi1";
++			reg = <0x7ef05700 0x300>,
++			      <0x7ef05300 0x200>,
++			      <0x7ef05f00 0x80>,
++			      <0x7ef05f80 0x80>,
++			      <0x7ef06b00 0x200>,
++			      <0x7ef06f00 0x400>,
++			      <0x7ef00280 0x80>,
++			      <0x7ef09300 0x100>,
++			      <0x7ef20000 0x100>,
++			      <0x7ef00100 0x30>;
++			reg-names = "hdmi",
++				    "dvp",
++				    "phy",
++				    "rm",
++				    "packet",
++				    "metadata",
++				    "csc",
++				    "cec",
++				    "hd",
++				    "intr2";
++			ddc = <&ddc1>;
++			clocks = <&firmware_clocks 13>;
++			clock-names = "hdmi";
++			resets = <&dvp 1>;
++			dmas = <&dma 17>;
++			dma-names = "audio-rx";
++			interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
++			status = "disabled";
++		};
++
++		ddc1: i2c@7ef09500 {
++			compatible = "brcm,bcm2711-hdmi-i2c";
++			reg = <0x7ef09500 0x100>, <0x7ef05b00 0x300>;
++			reg-names = "bsc", "auto-i2c";
++			clock-frequency = <97500>;
++			status = "disabled";
++		};
+ 	};
+ 
+ 	__overrides__ {
+@@ -42,22 +165,33 @@
+ 	scb: scb {
+ 	     /* Add a label */
+ 	};
+-};
+ 
+-&cma {
+-	/* Limit cma to the lower 768MB to allow room for HIGHMEM on 32-bit */
+-	alloc-ranges = <0x0 0x00000000 0x30000000>;
++	vc4: gpu {
++		compatible = "brcm,bcm2711-vc5";
++		status = "disabled";
++	};
++
++	clk_108MHz: clk-108M {
++		#clock-cells = <0>;
++		compatible = "fixed-clock";
++		clock-frequency = <108000000>;
++		clock-output-names = "108MHz-clock";
++	};
+ };
+ 
+ &soc {
+ 	/delete-node/ audio;
+ };
+ 
++&cma {
++	/* Limit cma to the lower 768MB to allow room for HIGHMEM on 32-bit */
++	alloc-ranges = <0x0 0x00000000 0x30000000>;
++};
++
+ &scb {
+ 	ranges = <0x0 0x7c000000  0x0 0xfc000000  0x0 0x03800000>,
+ 		 <0x0 0x40000000  0x0 0xff800000  0x0 0x00800000>,
+-		 <0x6 0x00000000  0x6 0x00000000  0x0 0x40000000>,
+-		 <0x0 0x00000000  0x0 0x00000000  0x0 0xfc000000>;
++		 <0x6 0x00000000  0x6 0x00000000  0x0 0x40000000>;
+ 	dma-ranges = <0x0 0x00000000  0x0 0x00000000  0x0 0xfc000000>,
+ 		     <0x1 0x00000000  0x1 0x00000000  0x1 0x00000000>;
+ 
+@@ -171,6 +305,10 @@
+ 	compatible = "brcm,bcm2711-genet-v5", "brcm,genet-v5";
+ };
+ 
++&hvs {
++	clocks = <&firmware_clocks 4>;
++};
++
+ &firmware {
+ 	firmware_clocks: clocks {
+ 		compatible = "raspberrypi,firmware-clocks";
+--- a/arch/arm/boot/dts/bcm2711.dtsi
++++ b/arch/arm/boot/dts/bcm2711.dtsi
+@@ -12,18 +12,6 @@
+ 
+ 	interrupt-parent = <&gicv2>;
+ 
+-	vc4: gpu {
+-		compatible = "brcm,bcm2711-vc5";
+-		status = "disabled";
+-	};
+-
+-	clk_108MHz: clk-108M {
+-		#clock-cells = <0>;
+-		compatible = "fixed-clock";
+-		clock-frequency = <108000000>;
+-		clock-output-names = "108MHz-clock";
+-	};
+-
+ 	soc {
+ 		/*
+ 		 * Defined ranges:
+@@ -245,27 +233,6 @@
+ 			status = "disabled";
+ 		};
+ 
+-		pixelvalve0: pixelvalve@7e206000 {
+-			compatible = "brcm,bcm2711-pixelvalve0";
+-			reg = <0x7e206000 0x100>;
+-			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+-			status = "disabled";
+-		};
+-
+-		pixelvalve1: pixelvalve@7e207000 {
+-			compatible = "brcm,bcm2711-pixelvalve1";
+-			reg = <0x7e207000 0x100>;
+-			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+-			status = "disabled";
+-		};
+-
+-		pixelvalve2: pixelvalve@7e20a000 {
+-			compatible = "brcm,bcm2711-pixelvalve2";
+-			reg = <0x7e20a000 0x100>;
+-			interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+-			status = "disabled";
+-		};
+-
+ 		pwm1: pwm@7e20c800 {
+ 			compatible = "brcm,bcm2835-pwm";
+ 			reg = <0x7e20c800 0x28>;
+@@ -276,118 +243,30 @@
+ 			status = "disabled";
+ 		};
+ 
+-		pixelvalve4: pixelvalve@7e216000 {
+-			compatible = "brcm,bcm2711-pixelvalve4";
+-			reg = <0x7e216000 0x100>;
+-			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+-			status = "disabled";
+-		};
+-
+-		emmc2: emmc2@7e340000 {
+-			compatible = "brcm,bcm2711-emmc2";
+-			reg = <0x7e340000 0x100>;
+-			interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
+-			clocks = <&clocks BCM2711_CLOCK_EMMC2>;
+-			status = "disabled";
+-		};
+-
+ 		hvs@7e400000 {
+-			clocks = <&firmware_clocks 4>;
+ 			interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
+ 		};
++	};
+ 
+-		pixelvalve3: pixelvalve@7ec12000 {
+-			compatible = "brcm,bcm2711-pixelvalve3";
+-			reg = <0x7ec12000 0x100>;
+-			interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+-			status = "disabled";
+-		};
++	/*
++	 * emmc2 has different DMA constraints based on SoC revisions. It was
++	 * moved into its own bus, so as for RPi4's firmware to update them.
++	 * The firmware will find whether the emmc2bus alias is defined, and if
++	 * so, it'll edit the dma-ranges property below accordingly.
++	 */
++	emmc2bus: emmc2bus {
++		compatible = "simple-bus";
++		#address-cells = <2>;
++		#size-cells = <1>;
+ 
+-		dvp: clock@7ef00000 {
+-			compatible = "brcm,brcm2711-dvp";
+-			reg = <0x7ef00000 0x10>;
+-			clocks = <&clk_108MHz>;
+-			#clock-cells = <1>;
+-			#reset-cells = <1>;
+-		};
++		ranges = <0x0 0x7e000000  0x0 0xfe000000  0x01800000>;
++		dma-ranges = <0x0 0xc0000000  0x0 0x00000000  0x40000000>;
+ 
+-		hdmi0: hdmi@7ef00700 {
+-			compatible = "brcm,bcm2711-hdmi0";
+-			reg = <0x7ef00700 0x300>,
+-			      <0x7ef00300 0x200>,
+-			      <0x7ef00f00 0x80>,
+-			      <0x7ef00f80 0x80>,
+-			      <0x7ef01b00 0x200>,
+-			      <0x7ef01f00 0x400>,
+-			      <0x7ef00200 0x80>,
+-			      <0x7ef04300 0x100>,
+-			      <0x7ef20000 0x100>,
+-			      <0x7ef00100 0x30>;
+-			reg-names = "hdmi",
+-				    "dvp",
+-				    "phy",
+-				    "rm",
+-				    "packet",
+-				    "metadata",
+-				    "csc",
+-				    "cec",
+-				    "hd",
+-				    "intr2";
+-			clocks = <&firmware_clocks 13>;
+-			clock-names = "hdmi";
+-			resets = <&dvp 0>;
+-			ddc = <&ddc0>;
+-			dmas = <&dma 10>;
+-			dma-names = "audio-rx";
+-			interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+-			status = "disabled";
+-		};
+-
+-		ddc0: i2c@7ef04500 {
+-			compatible = "brcm,bcm2711-hdmi-i2c";
+-			reg = <0x7ef04500 0x100>, <0x7ef00b00 0x300>;
+-			reg-names = "bsc", "auto-i2c";
+-			clock-frequency = <97500>;
+-			status = "disabled";
+-		};
+-
+-		hdmi1: hdmi@7ef05700 {
+-			compatible = "brcm,bcm2711-hdmi1";
+-			reg = <0x7ef05700 0x300>,
+-			      <0x7ef05300 0x200>,
+-			      <0x7ef05f00 0x80>,
+-			      <0x7ef05f80 0x80>,
+-			      <0x7ef06b00 0x200>,
+-			      <0x7ef06f00 0x400>,
+-			      <0x7ef00280 0x80>,
+-			      <0x7ef09300 0x100>,
+-			      <0x7ef20000 0x100>,
+-			      <0x7ef00100 0x30>;
+-			reg-names = "hdmi",
+-				    "dvp",
+-				    "phy",
+-				    "rm",
+-				    "packet",
+-				    "metadata",
+-				    "csc",
+-				    "cec",
+-				    "hd",
+-				    "intr2";
+-			ddc = <&ddc1>;
+-			clocks = <&firmware_clocks 13>;
+-			clock-names = "hdmi";
+-			resets = <&dvp 1>;
+-			dmas = <&dma 17>;
+-			dma-names = "audio-rx";
+-			interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+-			status = "disabled";
+-		};
+-
+-		ddc1: i2c@7ef09500 {
+-			compatible = "brcm,bcm2711-hdmi-i2c";
+-			reg = <0x7ef09500 0x100>, <0x7ef05b00 0x300>;
+-			reg-names = "bsc", "auto-i2c";
+-			clock-frequency = <97500>;
++		emmc2: emmc2@7e340000 {
++			compatible = "brcm,bcm2711-emmc2";
++			reg = <0x0 0x7e340000 0x100>;
++			interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
++			clocks = <&clocks BCM2711_CLOCK_EMMC2>;
+ 			status = "disabled";
+ 		};
+ 	};