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authorÁlvaro Fernández Rojas <noltari@gmail.com>2021-02-18 18:04:33 +0100
committerÁlvaro Fernández Rojas <noltari@gmail.com>2021-02-18 23:42:32 +0100
commitf07e572f6447465d8938679533d604e402b0f066 (patch)
treecb333bd2a67e59e7c07659514850a0fd55fc825e /target/linux/bcm27xx/patches-5.4/950-0868-bcm2835-dma-Add-NO_WAIT_RESP-flag.patch
parent5d3a6fd970619dfc55f8259035c3027d7613a2a6 (diff)
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bcm27xx: import latest patches from the RPi foundation
bcm2708: boot tested on RPi B+ v1.2 bcm2709: boot tested on RPi 3B v1.2 and RPi 4B v1.1 4G bcm2710: boot tested on RPi 3B v1.2 bcm2711: boot tested on RPi 4B v1.1 4G Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Diffstat (limited to 'target/linux/bcm27xx/patches-5.4/950-0868-bcm2835-dma-Add-NO_WAIT_RESP-flag.patch')
-rw-r--r--target/linux/bcm27xx/patches-5.4/950-0868-bcm2835-dma-Add-NO_WAIT_RESP-flag.patch54
1 files changed, 54 insertions, 0 deletions
diff --git a/target/linux/bcm27xx/patches-5.4/950-0868-bcm2835-dma-Add-NO_WAIT_RESP-flag.patch b/target/linux/bcm27xx/patches-5.4/950-0868-bcm2835-dma-Add-NO_WAIT_RESP-flag.patch
new file mode 100644
index 0000000000..8fc7069e61
--- /dev/null
+++ b/target/linux/bcm27xx/patches-5.4/950-0868-bcm2835-dma-Add-NO_WAIT_RESP-flag.patch
@@ -0,0 +1,54 @@
+From 8c070947d0d9ef7f890eeff329d4deb1c393ef87 Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.com>
+Date: Wed, 1 Jul 2020 20:28:27 +0100
+Subject: [PATCH] bcm2835-dma: Add NO_WAIT_RESP flag
+
+Use bit 27 of the dreq value (the second cell of the DT DMA descriptor)
+to request that the WAIT_RESP bit is not set.
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.com>
+---
+ drivers/dma/bcm2835-dma.c | 11 ++++++++---
+ 1 file changed, 8 insertions(+), 3 deletions(-)
+
+--- a/drivers/dma/bcm2835-dma.c
++++ b/drivers/dma/bcm2835-dma.c
+@@ -167,6 +167,11 @@ struct bcm2835_desc {
+ #define BCM2835_DMA_WAIT(x) ((x & 31) << 21) /* add DMA-wait cycles */
+ #define BCM2835_DMA_NO_WIDE_BURSTS BIT(26) /* no 2 beat write bursts */
+
++/* A fake bit to request that the driver doesn't set the WAIT_RESP bit. */
++#define BCM2835_DMA_NO_WAIT_RESP BIT(27)
++#define WAIT_RESP(x) ((x & BCM2835_DMA_NO_WAIT_RESP) ? \
++ 0 : BCM2835_DMA_WAIT_RESP)
++
+ /* debug register bits */
+ #define BCM2835_DMA_DEBUG_LAST_NOT_SET_ERR BIT(0)
+ #define BCM2835_DMA_DEBUG_FIFO_ERR BIT(1)
+@@ -845,7 +850,7 @@ static struct dma_async_tx_descriptor *b
+ struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
+ struct bcm2835_desc *d;
+ u32 info = BCM2835_DMA_D_INC | BCM2835_DMA_S_INC;
+- u32 extra = BCM2835_DMA_INT_EN | BCM2835_DMA_WAIT_RESP;
++ u32 extra = BCM2835_DMA_INT_EN | WAIT_RESP(c->dreq);
+ size_t max_len = bcm2835_dma_max_frame_length(c);
+ size_t frames;
+
+@@ -875,7 +880,7 @@ static struct dma_async_tx_descriptor *b
+ struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
+ struct bcm2835_desc *d;
+ dma_addr_t src = 0, dst = 0;
+- u32 info = BCM2835_DMA_WAIT_RESP;
++ u32 info = WAIT_RESP(c->dreq);
+ u32 extra = BCM2835_DMA_INT_EN;
+ size_t frames;
+
+@@ -937,7 +942,7 @@ static struct dma_async_tx_descriptor *b
+ struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
+ struct bcm2835_desc *d;
+ dma_addr_t src, dst;
+- u32 info = BCM2835_DMA_WAIT_RESP;
++ u32 info = WAIT_RESP(c->dreq);
+ u32 extra = 0;
+ size_t max_len = bcm2835_dma_max_frame_length(c);
+ size_t frames;