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authorAdrian Schmutzler <freifunk@adrianschmutzler.de>2020-02-08 20:33:30 +0100
committerAdrian Schmutzler <freifunk@adrianschmutzler.de>2020-02-14 14:10:51 +0100
commite7bfda2c243e66a75ff966ba04c28b1590b5d24c (patch)
tree069959b7e6a8cf31b0feb2857a63c7c4c0e3dcbf /target/linux/bcm63xx/patches-4.19/338-MIPS-BCM63XX-increase-number-of-IRQs.patch
parent8fe5ad5d3373cebed4fbc55a7b779721971ce427 (diff)
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brcm63xx: rename target to bcm63xx
This change makes the names of Broadcom targets consistent by using the common notation based on SoC/CPU ID (which is used internally anyway), bcmXXXX instead of brcmXXXX. This is even used for target TITLE in make menuconfig already, only the short target name used brcm so far. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Diffstat (limited to 'target/linux/bcm63xx/patches-4.19/338-MIPS-BCM63XX-increase-number-of-IRQs.patch')
-rw-r--r--target/linux/bcm63xx/patches-4.19/338-MIPS-BCM63XX-increase-number-of-IRQs.patch39
1 files changed, 39 insertions, 0 deletions
diff --git a/target/linux/bcm63xx/patches-4.19/338-MIPS-BCM63XX-increase-number-of-IRQs.patch b/target/linux/bcm63xx/patches-4.19/338-MIPS-BCM63XX-increase-number-of-IRQs.patch
new file mode 100644
index 0000000000..1809a3cac4
--- /dev/null
+++ b/target/linux/bcm63xx/patches-4.19/338-MIPS-BCM63XX-increase-number-of-IRQs.patch
@@ -0,0 +1,39 @@
+From 6f5658c845cf1f79213b1d20423a04967259fdaa Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 15 Dec 2013 20:46:26 +0100
+Subject: [PATCH 48/53] MIPS: BCM63XX: increase number of IRQs
+
+Newer SoCs have 128 bit wide irq registers, thus 128 available internal
+interupts.
+---
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h | 4 +++-
+ arch/mips/include/asm/mach-bcm63xx/irq.h | 2 +-
+ 2 files changed, 4 insertions(+), 2 deletions(-)
+
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h
+@@ -2,10 +2,12 @@
+ #ifndef BCM63XX_IRQ_H_
+ #define BCM63XX_IRQ_H_
+
++#include <irq.h>
+ #include <bcm63xx_cpu.h>
+
+ #define IRQ_INTERNAL_BASE 8
+-#define IRQ_EXTERNAL_BASE 100
++#define NR_INTERNAL_IRQS 128
++#define IRQ_EXTERNAL_BASE (IRQ_INTERNAL_BASE + NR_INTERNAL_IRQS)
+ #define IRQ_EXT_0 (IRQ_EXTERNAL_BASE + 0)
+ #define IRQ_EXT_1 (IRQ_EXTERNAL_BASE + 1)
+ #define IRQ_EXT_2 (IRQ_EXTERNAL_BASE + 2)
+--- a/arch/mips/include/asm/mach-bcm63xx/irq.h
++++ b/arch/mips/include/asm/mach-bcm63xx/irq.h
+@@ -2,7 +2,7 @@
+ #ifndef __ASM_MACH_BCM63XX_IRQ_H
+ #define __ASM_MACH_BCM63XX_IRQ_H
+
+-#define NR_IRQS 128
++#define NR_IRQS 256
+ #define MIPS_CPU_IRQ_BASE 0
+
+ #endif