bmips: add new target

This target has full device tree support, thus reducing the number of
patches needed for bcm63xx, in which there's a patch for every board.

The intention is to start with a minimal amount of downstream patches and
start upstreaming all of them.

Current status:
 - Enabling EHCI/OHCI on BCM6358 causes a kernel panic.
 - BCM63268 lacks Timer Clocks/Reset support.
 - No PCI/PCIe drivers.
 - No ethernet drivers.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>

1 files changed, 475 insertions, 0 deletions

diff --git a/target/linux/bmips/dts/bcm6368.dtsi b/target/linux/bmips/dts/bcm6368.dtsi
new file mode 100644
index 0000000000..e428a214ee
--- /dev/null
+++ b/target/linux/bmips/dts/bcm6368.dtsi
@@ -0,0 +1,475 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/dts-v1/;
+
+#include <dt-bindings/clock/bcm6368-clock.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/interrupt-controller/bcm6368-interrupt-controller.h>
+#include <dt-bindings/reset/bcm6368-reset.h>
+
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "brcm,bcm6368";
+
+	aliases {
+		nflash = &nflash;
+		pflash = &pflash;
+		pinctrl = &pinctrl;
+		serial0 = &uart0;
+		serial1 = &uart1;
+		spi0 = &lsspi;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,115200n8 earlycon";
+		stdout-path = "serial0:115200n8";
+	};
+
+	clocks {
+		periph_osc: periph-osc {
+			compatible = "fixed-clock";
+
+			#clock-cells = <0>;
+
+			clock-frequency = <50000000>;
+			clock-output-names = "periph";
+		};
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		mips-hpt-frequency = <200000000>;
+
+		cpu@0 {
+			compatible = "brcm,bmips4350", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <0>;
+		};
+
+		cpu@1 {
+			compatible = "brcm,bmips4350", "mips,mips4Kc";
+			device_type = "cpu";
+			reg = <1>;
+		};
+	};
+
+	cpu_intc: interrupt-controller {
+		#address-cells = <0>;
+		compatible = "mti,cpu-interrupt-controller";
+
+		interrupt-controller;
+		#interrupt-cells = <1>;
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0 0>;
+	};
+
+	ubus {
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		compatible = "simple-bus";
+		ranges;
+
+		periph_clk: clock-controller@10000004 {
+			compatible = "brcm,bcm6368-clocks";
+			reg = <0x10000004 0x4>;
+			#clock-cells = <1>;
+		};
+
+		pll_cntl: syscon@10000008 {
+			compatible = "syscon";
+			reg = <0x10000008 0x4>;
+			native-endian;
+		};
+
+		syscon-reboot {
+			compatible = "syscon-reboot";
+			regmap = <&pll_cntl>;
+			offset = <0x0>;
+			mask = <0x1>;
+		};
+
+		periph_rst: reset-controller@10000010 {
+			compatible = "brcm,bcm6345-reset";
+			reg = <0x10000010 0x4>;
+			#reset-cells = <1>;
+		};
+
+		ext_intc0: interrupt-controller@10000018 {
+			#address-cells = <1>;
+			compatible = "brcm,bcm6345-ext-intc";
+			reg = <0x10000018 0x4>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+
+			interrupts = <BCM6368_IRQ_EXT0>,
+				     <BCM6368_IRQ_EXT1>,
+				     <BCM6368_IRQ_EXT2>,
+				     <BCM6368_IRQ_EXT3>;
+		};
+
+		ext_intc1: interrupt-controller@1000001c {
+			#address-cells = <1>;
+			compatible = "brcm,bcm6345-ext-intc";
+			reg = <0x1000001c 0x4>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+
+			interrupts = <BCM6368_IRQ_EXT4>,
+				     <BCM6368_IRQ_EXT5>;
+		};
+
+		periph_intc: interrupt-controller@10000020 {
+			#address-cells = <1>;
+			compatible = "brcm,bcm6345-l1-intc";
+			reg = <0x10000020 0x10>,
+			      <0x10000030 0x10>;
+
+			interrupt-controller;
+			#interrupt-cells = <1>;
+
+			interrupt-parent = <&cpu_intc>;
+			interrupts = <2>, <3>;
+		};
+
+		wdt: watchdog@1000005c {
+			compatible = "brcm,bcm7038-wdt";
+			reg = <0x1000005c 0xc>;
+
+			clocks = <&periph_osc>;
+
+			timeout-sec = <30>;
+		};
+
+		pinctrl: pin-controller@10000080 {
+			compatible = "brcm,bcm6368-pinctrl";
+			reg = <0x10000080 0x8>,
+			      <0x10000088 0x8>,
+			      <0x10000098 0x4>;
+			reg-names = "dirout", "dat", "mode";
+			brcm,gpiobasemode = <&gpiobasemode>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupts-extended = <&ext_intc1 0 0>,
+					      <&ext_intc1 1 0>,
+					      <&ext_intc0 0 0>,
+					      <&ext_intc0 1 0>,
+					      <&ext_intc0 2 0>,
+					      <&ext_intc0 3 0>;
+			interrupt-names = "gpio32", "gpio33", "gpio34", "gpio35",
+					  "gpio36", "gpio37";
+
+			pinctrl_analog_afe_0: analog_afe_0 {
+				function = "analog_afe_0";
+				pins = "gpio0";
+			};
+
+			pinctrl_analog_afe_1: analog_afe_1 {
+				function = "analog_afe_1";
+				pins = "gpio1";
+			};
+
+			pinctrl_sys_irq: sys_irq {
+				function = "sys_irq";
+				pins = "gpio2";
+			};
+
+			pinctrl_serial_led: serial_led {
+				pinctrl_serial_led_data: serial_led_data {
+					function = "serial_led_data";
+					pins = "gpio3";
+				};
+
+				pinctrl_serial_led_clk: serial_led_clk {
+					function = "serial_led_clk";
+					pins = "gpio4";
+				};
+			};
+
+			pinctrl_inet_led: inet_led {
+				function = "inet_led";
+				pins = "gpio5";
+			};
+
+			pinctrl_ephy0_led: ephy0_led {
+				function = "ephy0_led";
+				pins = "gpio6";
+			};
+
+			pinctrl_ephy1_led: ephy1_led {
+				function = "ephy1_led";
+				pins = "gpio7";
+			};
+
+			pinctrl_ephy2_led: ephy2_led {
+				function = "ephy2_led";
+				pins = "gpio8";
+			};
+
+			pinctrl_ephy3_led: ephy3_led {
+				function = "ephy3_led";
+				pins = "gpio9";
+			};
+
+			pinctrl_robosw_led_data: robosw_led_data {
+				function = "robosw_led_data";
+				pins = "gpio10";
+			};
+
+			pinctrl_robosw_led_clk: robosw_led_clk {
+				function = "robosw_led_clk";
+				pins = "gpio11";
+			};
+
+			pinctrl_robosw_led0: robosw_led0 {
+				function = "robosw_led0";
+				pins = "gpio12";
+			};
+
+			pinctrl_robosw_led1: robosw_led1 {
+				function = "robosw_led1";
+				pins = "gpio13";
+			};
+
+			pinctrl_usb_device_led: usb_device_led {
+				function = "usb_device_led";
+				pins = "gpio14";
+			};
+
+			pinctrl_pci: pci {
+				pinctrl_pci_req1: pci_req1 {
+					function = "pci_req1";
+					pins = "gpio16";
+				};
+
+				pinctrl_pci_gnt1: pci_gnt1 {
+					function = "pci_gnt1";
+					pins = "gpio17";
+				};
+
+				pinctrl_pci_intb: pci_intb {
+					function = "pci_intb";
+					pins = "gpio18";
+				};
+
+				pinctrl_pci_req0: pci_req0 {
+					function = "pci_req0";
+					pins = "gpio19";
+				};
+
+				pinctrl_pci_gnt0: pci_gnt0 {
+					function = "pci_gnt0";
+					pins = "gpio20";
+				};
+			};
+
+			pinctrl_pcmcia: pcmcia {
+				pinctrl_pcmcia_cd1: pcmcia_cd1 {
+					function = "pcmcia_cd1";
+					pins = "gpio22";
+				};
+
+				pinctrl_pcmcia_cd2: pcmcia_cd2 {
+					function = "pcmcia_cd2";
+					pins = "gpio23";
+				};
+
+				pinctrl_pcmcia_vs1: pcmcia_vs1 {
+					function = "pcmcia_vs1";
+					pins = "gpio24";
+				};
+
+				pinctrl_pcmcia_vs2: pcmcia_vs2 {
+					function = "pcmcia_vs2";
+					pins = "gpio25";
+				};
+			};
+
+			pinctrl_ebi_cs2: ebi_cs2 {
+				function = "ebi_cs2";
+				pins = "gpio26";
+			};
+
+			pinctrl_ebi_cs3: ebi_cs3 {
+				function = "ebi_cs2";
+				pins = "gpio27";
+			};
+
+			pinctrl_spi_cs2: spi_cs2 {
+				function = "spi_cs2";
+				pins = "gpio28";
+			};
+
+			pinctrl_spi_cs3: spi_cs3 {
+				function = "spi_cs3";
+				pins = "gpio29";
+			};
+
+			pinctrl_spi_cs4: spi_cs4 {
+				function = "spi_cs4";
+				pins = "gpio30";
+			};
+
+			pinctrl_spi_cs5: spi_cs5 {
+				function = "spi_cs5";
+				pins = "gpio31";
+			};
+
+			pinctrl_uart1: uart1 {
+				function = "uart1";
+				group = "uart1_grp";
+			};
+		};
+
+		gpiobasemode: gpiobasemode@100000b8 {
+			compatible = "brcm,bcm6368-gpiobasemode", "syscon";
+			reg = <0x100000b8 0x4>;
+		};
+
+		leds: led-controller@100000d0 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "brcm,bcm6358-leds";
+			reg = <0x100000d0 0x8>;
+
+			status = "disabled";
+		};
+
+		uart0: serial@10000100 {
+			compatible = "brcm,bcm6345-uart";
+			reg = <0x10000100 0x18>;
+
+			interrupt-parent = <&periph_intc>;
+			interrupts = <BCM6368_IRQ_UART0>;
+
+			clocks = <&periph_osc>;
+			clock-names = "periph";
+
+			status = "disabled";
+		};
+
+		uart1: serial@10000120 {
+			compatible = "brcm,bcm6345-uart";
+			reg = <0x10000120 0x18>;
+
+			interrupt-parent = <&periph_intc>;
+			interrupts = <BCM6368_IRQ_UART1>;
+
+			clocks = <&periph_osc>;
+			clock-names = "periph";
+
+			status = "disabled";
+		};
+
+		nflash: nand@10000200 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "brcm,nand-bcm6368",
+				     "brcm,brcmnand-v2.1",
+				     "brcm,brcmnand";
+			reg = <0x10000200 0x180>,
+			      <0x10000600 0x200>,
+			      <0x10000070 0x10>;
+			reg-names = "nand",
+				    "nand-cache",
+				    "nand-int-base";
+
+			interrupt-parent = <&periph_intc>;
+			interrupts = <BCM6368_IRQ_NAND>;
+
+			clocks = <&periph_clk BCM6368_CLK_NAND>;
+			clock-names = "nand";
+
+			status = "disabled";
+		};
+
+		lsspi: spi@10000800 {
+			compatible = "brcm,bcm6358-spi";
+			reg = <0x10000800 0x70c>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			interrupt-parent = <&periph_intc>;
+			interrupts = <BCM6368_IRQ_SPI>;
+
+			clocks = <&periph_clk BCM6368_CLK_SPI>;
+			clock-names = "spi";
+
+			resets = <&periph_rst BCM6368_RST_SPI>;
+
+			status = "disabled";
+		};
+
+		ehci: usb@10001500 {
+			compatible = "brcm,bcm6368-ehci", "generic-ehci";
+			reg = <0x10001500 0x100>;
+			big-endian;
+			ignore-oc;
+
+			interrupt-parent = <&periph_intc>;
+			interrupts = <BCM6368_IRQ_EHCI>;
+
+			phys = <&usbh 0>;
+			phy-names = "usb";
+
+			status = "disabled";
+		};
+
+		ohci: usb@10001600 {
+			compatible = "brcm,bcm6368-ohci", "generic-ohci";
+			reg = <0x10001600 0x100>;
+			big-endian;
+			no-big-frame-no;
+
+			interrupt-parent = <&periph_intc>;
+			interrupts = <BCM6368_IRQ_OHCI>;
+
+			phys = <&usbh 0>;
+			phy-names = "usb";
+
+			status = "disabled";
+		};
+
+		usbh: usb-phy@10001700 {
+			compatible = "brcm,bcm6368-usbh-phy";
+			reg = <0x10001700 0x38>;
+
+			#phy-cells = <1>;
+
+			clocks = <&periph_clk BCM6368_CLK_USBH>;
+			clock-names = "usbh";
+
+			resets = <&periph_rst BCM6368_RST_USBH>;
+
+			status = "disabled";
+		};
+
+		random: rng@10004180 {
+			compatible = "brcm,bcm6368-rng";
+			reg = <0x10004180 0x14>;
+
+			clocks = <&periph_clk BCM6368_CLK_IPSEC>;
+			clock-names = "ipsec";
+		};
+	};
+
+	pflash: nor@18000000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "cfi-flash";
+		reg = <0x18000000 0x2000000>;
+		bank-width = <2>;
+
+		status = "disabled";
+	};
+};