bmips: add new target

This target has full device tree support, thus reducing the number of
patches needed for bcm63xx, in which there's a patch for every board.

The intention is to start with a minimal amount of downstream patches and
start upstreaming all of them.

Current status:
 - Enabling EHCI/OHCI on BCM6358 causes a kernel panic.
 - BCM63268 lacks Timer Clocks/Reset support.
 - No PCI/PCIe drivers.
 - No ethernet drivers.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>

6 files changed, 418 insertions, 0 deletions

diff --git a/target/linux/bmips/files/include/dt-bindings/interrupt-controller/bcm6318-interrupt-controller.h b/target/linux/bmips/files/include/dt-bindings/interrupt-controller/bcm6318-interrupt-controller.h
new file mode 100644
index 0000000000..34bf929eda
--- /dev/null
+++ b/target/linux/bmips/files/include/dt-bindings/interrupt-controller/bcm6318-interrupt-controller.h
@@ -0,0 +1,84 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#ifndef __DT_BINDINGS_INTERRUPT_CONTROLLER_BCM6318_H
+#define __DT_BINDINGS_INTERRUPT_CONTROLLER_BCM6318_H
+
+#define BCM6318_IRQ_TIMER0		0
+#define BCM6318_IRQ_TIMER1		1
+#define BCM6318_IRQ_TIMER2		2
+#define BCM6318_IRQ_TIMER3		3
+#define BCM6318_IRQ_USBS		4
+#define BCM6318_IRQ_USB_CTL_RX_DMA	5
+#define BCM6318_IRQ_USB_CTL_TX_DMA	6
+#define BCM6318_IRQ_USB_BULK_RX_DMA	7
+#define BCM6318_IRQ_USB_BULK_TX_DMA	8
+#define BCM6318_IRQ_USB_ISO_RX_DMA	9
+#define BCM6318_IRQ_USB_ISO_TX_DMA	10
+#define BCM6318_IRQ_DG			11
+#define BCM6318_IRQ_EPHY		12
+#define BCM6318_IRQ_EPHY_EN0N		13
+#define BCM6318_IRQ_EPHY_EN1N		14
+#define BCM6318_IRQ_EPHY_EN2N		15
+#define BCM6318_IRQ_EPHY_EN3N		16
+#define BCM6318_IRQ_EPHY_EN0		17
+#define BCM6318_IRQ_EPHY_EN1		18
+#define BCM6318_IRQ_EPHY_EN2		19
+#define BCM6318_IRQ_EPHY_EN3		20
+#define BCM6318_IRQ_XDSL		21
+#define BCM6318_IRQ_SDR			22
+#define BCM6318_IRQ_PCIE_RC		23
+#define BCM6318_IRQ_EXT0		24
+#define BCM6318_IRQ_EXT1		25
+#define BCM6318_IRQ_EXT2		26
+#define BCM6318_IRQ_EXT3		27
+#define BCM6318_IRQ_UART0		28
+#define BCM6318_IRQ_HSSPI		29
+#define BCM6318_IRQ_WAKE_ON_IRQ		30
+#define BCM6318_IRQ_TIMER		31
+#define BCM6318_IRQ_ENETSW_RX_DMA0	32
+#define BCM6318_IRQ_ENETSW_RX_DMA1	33
+#define BCM6318_IRQ_ENETSW_RX_DMA2	34
+#define BCM6318_IRQ_ENETSW_RX_DMA3	35
+#define BCM6318_IRQ_WDTIMER		37
+#define BCM6318_IRQ_ENETSW		40
+#define BCM6318_IRQ_OHCI		41
+#define BCM6318_IRQ_EHCI		42
+#define BCM6318_IRQ_ATM_DMA0		43
+#define BCM6318_IRQ_ATM_DMA1		44
+#define BCM6318_IRQ_ATM_DMA2		45
+#define BCM6318_IRQ_ATM_DMA3		46
+#define BCM6318_IRQ_ATM_DMA4		47
+#define BCM6318_IRQ_ATM_DMA5		48
+#define BCM6318_IRQ_ATM_DMA6		49
+#define BCM6318_IRQ_ATM_DMA7		50
+#define BCM6318_IRQ_ATM_DMA8		51
+#define BCM6318_IRQ_ATM_DMA9		52
+#define BCM6318_IRQ_ATM_DMA10		53
+#define BCM6318_IRQ_ATM_DMA11		54
+#define BCM6318_IRQ_ATM_DMA12		55
+#define BCM6318_IRQ_ATM_DMA13		56
+#define BCM6318_IRQ_ATM_DMA14		57
+#define BCM6318_IRQ_ATM_DMA15		58
+#define BCM6318_IRQ_ATM_DMA16		59
+#define BCM6318_IRQ_ATM_DMA17		60
+#define BCM6318_IRQ_ATM_DMA18		61
+#define BCM6318_IRQ_ATM_DMA19		62
+#define BCM6318_IRQ_SAR			63
+#define BCM6318_IRQ_ADSL_ENERGY		64
+#define BCM6318_IRQ_ADSL_ENERGY_N	65
+#define BCM6318_IRQ_USB_ENERGY_ON	66
+#define BCM6318_IRQ_USB_ENERGY_OFF	67
+#define BCM6318_IRQ_PVTMON_TEMP		68
+#define BCM6318_IRQ_SYSPLL_LOCK		69
+#define BCM6318_IRQ_LCPLL_LOCK		70
+#define BCM6318_IRQ_PMU_STABLE		71
+#define BCM6318_IRQ_ENETSW_TX_DMA0	72
+#define BCM6318_IRQ_ENETSW_TX_DMA1	73
+#define BCM6318_IRQ_ENETSW_TX_DMA2	74
+#define BCM6318_IRQ_ENETSW_TX_DMA3	75
+#define BCM6318_IRQ_EPHY0_IDDQ_ENERGY	76
+#define BCM6318_IRQ_EPHY1_IDDQ_ENERGY	77
+#define BCM6318_IRQ_EPHY2_IDDQ_ENERGY	78
+#define BCM6318_IRQ_EPHY3_IDDQ_ENERGY	79
+
+#endif /* __DT_BINDINGS_INTERRUPT_CONTROLLER_BCM6318_H */
diff --git a/target/linux/bmips/files/include/dt-bindings/interrupt-controller/bcm63268-interrupt-controller.h b/target/linux/bmips/files/include/dt-bindings/interrupt-controller/bcm63268-interrupt-controller.h
new file mode 100644
index 0000000000..84a5f44611
--- /dev/null
+++ b/target/linux/bmips/files/include/dt-bindings/interrupt-controller/bcm63268-interrupt-controller.h
@@ -0,0 +1,86 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#ifndef __DT_BINDINGS_INTERRUPT_CONTROLLER_BCM63268_H
+#define __DT_BINDINGS_INTERRUPT_CONTROLLER_BCM63268_H
+
+#define BCM63268_IRQ_TIMER		0
+#define BCM63268_IRQ_ENETSW_RX_DMA0	1
+#define BCM63268_IRQ_ENETSW_RX_DMA1	2
+#define BCM63268_IRQ_ENETSW_RX_DMA2	3
+#define BCM63268_IRQ_ENETSW_RX_DMA3	4
+#define BCM63268_IRQ_UART0		5
+#define BCM63268_IRQ_HSSPI		6
+#define BCM63268_IRQ_WLAN		7
+#define BCM63268_IRQ_IPSEC		8
+#define BCM63268_IRQ_OHCI		9
+#define BCM63268_IRQ_EHCI		10
+#define BCM63268_IRQ_USBS		11
+#define BCM63268_IRQ_PCM		12
+#define BCM63268_IRQ_EPHY		13
+#define BCM63268_IRQ_DG			14
+#define BCM63268_IRQ_EPHY0_EN		15
+#define BCM63268_IRQ_EPHY1_EN		16
+#define BCM63268_IRQ_EPHY2_EN		17
+#define BCM63268_IRQ_GPHY_EN		18
+#define BCM63268_IRQ_USB_CTL_RX_DMA	19
+#define BCM63268_IRQ_USB_BULK_RX_DMA	20
+#define BCM63268_IRQ_ISO_RX_DMA		21
+#define BCM63268_IRQ_IPSEC_DMA0		22
+#define BCM63268_IRQ_XDSL		23
+#define BCM63268_IRQ_FAP0		24
+#define BCM63268_IRQ_FAP1		25
+#define BCM63268_IRQ_ATM_DMA0		26
+#define BCM63268_IRQ_ATM_DMA1		27
+#define BCM63268_IRQ_ATM_DMA2		28
+#define BCM63268_IRQ_ATM_DMA3		29
+#define BCM63268_IRQ_WAKE_ON_IRQ	30
+#define BCM63268_IRQ_GPHY		31
+#define BCM63268_IRQ_DECT0              32		
+#define BCM63268_IRQ_DECT1		33
+#define BCM63268_IRQ_UART1              34		
+#define BCM63268_IRQ_WLAN_GPIO		35
+#define BCM63268_IRQ_USB_CTL_TX_DMA	36
+#define BCM63268_IRQ_USB_BULK_TX_DMA	37
+#define BCM63268_IRQ_ISO_TX_DMA		38
+#define BCM63268_IRQ_IPSEC_DMA1		39
+#define BCM63268_IRQ_PCIE_RC		40
+#define BCM63268_IRQ_PCIE_EP		41
+#define BCM63268_IRQ_PCM_DMA0		42
+#define BCM63268_IRQ_PCM_DMA1		43
+#define BCM63268_IRQ_EXT0		44
+#define BCM63268_IRQ_EXT1		45
+#define BCM63268_IRQ_EXT2		46
+#define BCM63268_IRQ_EXT3		47
+#define BCM63268_IRQ_ENETSW		48
+#define BCM63268_IRQ_SAR		49
+#define BCM63268_IRQ_NAND		50
+#define BCM63268_IRQ_RING_OSC		52
+#define BCM63268_IRQ_USB_CONNECT	53
+#define BCM63268_IRQ_USB_DISCONNECT	54
+#define BCM63268_IRQ_PER_MBOX0		55
+#define BCM63268_IRQ_PER_MBOX1		56
+#define BCM63268_IRQ_PER_MBOX2		57
+#define BCM63268_IRQ_PER_MBOX3		58
+#define BCM63268_IRQ_ATM_DMA4		59
+#define BCM63268_IRQ_ATM_DMA5		60
+#define BCM63268_IRQ_ATM_DMA6		61
+#define BCM63268_IRQ_ATM_DMA7		62
+#define BCM63268_IRQ_ENETSW_TX_DMA0	64
+#define BCM63268_IRQ_ENETSW_TX_DMA1	65
+#define BCM63268_IRQ_ENETSW_TX_DMA2	66
+#define BCM63268_IRQ_ENETSW_TX_DMA3	67
+#define BCM63268_IRQ_ATM_DMA8		68
+#define BCM63268_IRQ_ATM_DMA9		69
+#define BCM63268_IRQ_ATM_DMA10		70
+#define BCM63268_IRQ_ATM_DMA11		71
+#define BCM63268_IRQ_ATM_DMA12		72
+#define BCM63268_IRQ_ATM_DMA13		73
+#define BCM63268_IRQ_ATM_DMA14		74
+#define BCM63268_IRQ_ATM_DMA15		75
+#define BCM63268_IRQ_ATM_DMA16		76
+#define BCM63268_IRQ_ATM_DMA17		77
+#define BCM63268_IRQ_ATM_DMA18		78
+#define BCM63268_IRQ_ATM_DMA19		79
+#define BCM63268_IRQ_LSSPI		80
+
+#endif /* __DT_BINDINGS_INTERRUPT_CONTROLLER_BCM63268_H */
diff --git a/target/linux/bmips/files/include/dt-bindings/interrupt-controller/bcm6328-interrupt-controller.h b/target/linux/bmips/files/include/dt-bindings/interrupt-controller/bcm6328-interrupt-controller.h
new file mode 100644
index 0000000000..1f5192d9fe
--- /dev/null
+++ b/target/linux/bmips/files/include/dt-bindings/interrupt-controller/bcm6328-interrupt-controller.h
@@ -0,0 +1,68 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#ifndef __DT_BINDINGS_INTERRUPT_CONTROLLER_BCM6328_H
+#define __DT_BINDINGS_INTERRUPT_CONTROLLER_BCM6328_H
+
+#define BCM6328_IRQ_NAND		0
+#define BCM6328_IRQ_PCM			1
+#define BCM6328_IRQ_PCM_DMA0		2
+#define BCM6328_IRQ_PCM_DMA1		3
+#define BCM6328_IRQ_USBS		4
+#define BCM6328_IRQ_USB_CTL_RX_DMA	5
+#define BCM6328_IRQ_USB_CTL_TX_DMA	6
+#define BCM6328_IRQ_USB_BULK_RX_DMA	7
+#define BCM6328_IRQ_USB_BULK_TX_DMA	8
+#define BCM6328_IRQ_USB_ISO_RX_DMA	9
+#define BCM6328_IRQ_USB_ISO_TX_DMA	10
+#define BCM6328_IRQ_DG			11
+#define BCM6328_IRQ_EPHY		12
+#define BCM6328_IRQ_EPHY_EN0N		13
+#define BCM6328_IRQ_EPHY_EN1N		14
+#define BCM6328_IRQ_EPHY_EN2N		15
+#define BCM6328_IRQ_EPHY_EN3N		16
+#define BCM6328_IRQ_EPHY_EN0		17
+#define BCM6328_IRQ_EPHY_EN1		18
+#define BCM6328_IRQ_EPHY_EN2		19
+#define BCM6328_IRQ_EPHY_EN3		20
+#define BCM6328_IRQ_XDSL		21
+#define BCM6328_IRQ_PCIE_EP		22
+#define BCM6328_IRQ_PCIE_RC		23
+#define BCM6328_IRQ_EXTO		24
+#define BCM6328_IRQ_EXT1		25
+#define BCM6328_IRQ_EXT2		26
+#define BCM6328_IRQ_EXT3		27
+#define BCM6328_IRQ_UART0		28
+#define BCM6328_IRQ_HSSPI		29
+#define BCM6328_IRQ_WAKE_ON_IRQ		30
+#define BCM6328_IRQ_TIMER		31
+#define BCM6328_IRQ_ENETSW_RX_DMA0	32
+#define BCM6328_IRQ_ENETSW_RX_DMA1	33
+#define BCM6328_IRQ_ENETSW_TX_DMA0	34
+#define BCM6328_IRQ_ENETSW_TX_DMA1	35
+#define BCM6328_IRQ_UART1		39
+#define BCM6328_IRQ_ENETSW		40
+#define BCM6328_IRQ_OHCI		41
+#define BCM6328_IRQ_EHCI		42
+#define BCM6328_IRQ_ATM_DMA0		43
+#define BCM6328_IRQ_ATM_DMA1		44
+#define BCM6328_IRQ_ATM_DMA2		45
+#define BCM6328_IRQ_ATM_DMA3		46
+#define BCM6328_IRQ_ATM_DMA4		47
+#define BCM6328_IRQ_ATM_DMA5		48
+#define BCM6328_IRQ_ATM_DMA6		49
+#define BCM6328_IRQ_ATM_DMA7		50
+#define BCM6328_IRQ_ATM_DMA8		51
+#define BCM6328_IRQ_ATM_DMA9		52
+#define BCM6328_IRQ_ATM_DMA10		53
+#define BCM6328_IRQ_ATM_DMA11		54
+#define BCM6328_IRQ_ATM_DMA12		55
+#define BCM6328_IRQ_ATM_DMA13		56
+#define BCM6328_IRQ_ATM_DMA14		57
+#define BCM6328_IRQ_ATM_DMA15		58
+#define BCM6328_IRQ_ATM_DMA16		59
+#define BCM6328_IRQ_ATM_DMA17		60
+#define BCM6328_IRQ_ATM_DMA18		61
+#define BCM6328_IRQ_ATM_DMA19		62
+#define BCM6328_IRQ_SAR			63
+
+#endif /* __DT_BINDINGS_INTERRUPT_CONTROLLER_BCM6328_H */
diff --git a/target/linux/bmips/files/include/dt-bindings/interrupt-controller/bcm6358-interrupt-controller.h b/target/linux/bmips/files/include/dt-bindings/interrupt-controller/bcm6358-interrupt-controller.h
new file mode 100644
index 0000000000..dc412d1f59
--- /dev/null
+++ b/target/linux/bmips/files/include/dt-bindings/interrupt-controller/bcm6358-interrupt-controller.h
@@ -0,0 +1,38 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#ifndef __DT_BINDINGS_INTERRUPT_CONTROLLER_BCM6358_H
+#define __DT_BINDINGS_INTERRUPT_CONTROLLER_BCM6358_H
+
+#define BCM6358_IRQ_TIMER		0
+#define BCM6358_IRQ_SPI			1
+#define BCM6358_IRQ_UART0		2
+#define BCM6358_IRQ_UART1		3
+#define BCM6358_IRQ_OHCI		5
+#define BCM6358_IRQ_EMAC1		6
+#define BCM6358_IRQ_USBS		7
+#define BCM6358_IRQ_EMAC0		8
+#define BCM6358_IRQ_EPHY		9
+#define BCM6358_IRQ_EHCI		10
+#define BCM6358_IRQ_USB_CTL_RX_DMA	11
+#define BCM6358_IRQ_USB_CTL_TX_DMA	12
+#define BCM6358_IRQ_USB_BULK_RX_DMA	13
+#define BCM6358_IRQ_USB_BULK_TX_DMA	14
+#define BCM6358_IRQ_EMAC0_RX_DMA	15
+#define BCM6358_IRQ_EMAC0_TX_DMA	16
+#define BCM6358_IRQ_EMAC1_RX_DMA	17
+#define BCM6358_IRQ_EMAC1_TX_DMA	18
+#define BCM6358_IRQ_ATM		        19
+#define BCM6358_IRQ_EXT4		20
+#define BCM6358_IRQ_EXT5		21
+#define BCM6358_IRQ_PCM			22
+#define BCM6358_IRQ_PCM_RX_DMA		23
+#define BCM6358_IRQ_PCM_TX_DMA		24
+#define BCM6358_IRQ_EXT0		25
+#define BCM6358_IRQ_EXT1		26
+#define BCM6358_IRQ_EXT2		27
+#define BCM6358_IRQ_EXT3		28
+#define BCM6358_IRQ_ADSL		29
+#define BCM6358_IRQ_DG			30
+#define BCM6358_IRQ_MPI			31
+
+#endif /* __DT_BINDINGS_INTERRUPT_CONTROLLER_BCM6358_H */
diff --git a/target/linux/bmips/files/include/dt-bindings/interrupt-controller/bcm6362-interrupt-controller.h b/target/linux/bmips/files/include/dt-bindings/interrupt-controller/bcm6362-interrupt-controller.h
new file mode 100644
index 0000000000..2cb329204a
--- /dev/null
+++ b/target/linux/bmips/files/include/dt-bindings/interrupt-controller/bcm6362-interrupt-controller.h
@@ -0,0 +1,71 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#ifndef __DT_BINDINGS_INTERRUPT_CONTROLLER_BCM6362_H
+#define __DT_BINDINGS_INTERRUPT_CONTROLLER_BCM6362_H
+
+#define BCM6362_IRQ_TIMER		0
+#define BCM6362_IRQ_RING_OSC		1
+#define BCM6362_IRQ_LSSPI		2
+#define BCM6362_IRQ_UART0		3
+#define BCM6362_IRQ_UART1		4
+#define BCM6362_IRQ_HSSPI		5
+#define BCM6362_IRQ_WLAN_GPIO		6
+#define BCM6362_IRQ_WLAN		7
+#define BCM6362_IRQ_IPSEC		8
+#define BCM6362_IRQ_OHCI		9
+#define BCM6362_IRQ_EHCI		10
+#define BCM6362_IRQ_USBS		11
+#define BCM6362_IRQ_NAND		12
+#define BCM6362_IRQ_PCM			13
+#define BCM6362_IRQ_EPHY		14
+#define BCM6362_IRQ_DF			15
+#define BCM6362_IRQ_EPHY_EN0		16
+#define BCM6362_IRQ_EPHY_EN1		17
+#define BCM6362_IRQ_EPHY_EN2		18
+#define BCM6362_IRQ_EPHY_EN3		19
+#define BCM6362_IRQ_USB_CTL_RX_DMA	20
+#define BCM6362_IRQ_USB_CTL_TX_DMA	21
+#define BCM6362_IRQ_USB_BULK_RX_DMA	22
+#define BCM6362_IRQ_USB_BULK_TX_DMA	23
+#define BCM6362_IRQ_USB_ISO_RX_DMA	24
+#define BCM6362_IRQ_USB_ISO_TX_DMA	25
+#define BCM6362_IRQ_IPSEC_DMA0		26
+#define BCM6362_IRQ_IPSEC_DMA1		27
+#define BCM6362_IRQ_XDSL		28
+#define BCM6362_IRQ_FAP			29
+#define BCM6362_IRQ_PCIE_RC		30
+#define BCM6362_IRQ_PCIE_EP		31
+#define BCM6362_IRQ_ENETSW_RX_DMA0	32
+#define BCM6362_IRQ_ENETSW_RX_DMA1	33
+#define BCM6362_IRQ_ENETSW_RX_DMA2	34
+#define BCM6362_IRQ_ENETSW_RX_DMA3	35
+#define BCM6362_IRQ_PCM_DMA0		36
+#define BCM6362_IRQ_PCM_DMA1		37
+#define BCM6362_IRQ_DECT0		38
+#define BCM6362_IRQ_DECT1		39
+#define BCM6362_IRQ_EXT0		40
+#define BCM6362_IRQ_EXT1		41
+#define BCM6362_IRQ_EXT2		42
+#define BCM6362_IRQ_EXT3		43
+#define BCM6362_IRQ_ATM_DMA0		44
+#define BCM6362_IRQ_ATM_DMA1		45
+#define BCM6362_IRQ_ATM_DMA2		46
+#define BCM6362_IRQ_ATM_DMA3		47
+#define BCM6362_IRQ_ATM_DMA4		48
+#define BCM6362_IRQ_ATM_DMA5		49
+#define BCM6362_IRQ_ATM_DMA6		50
+#define BCM6362_IRQ_ATM_DMA7		51
+#define BCM6362_IRQ_ATM_DMA8		52
+#define BCM6362_IRQ_ATM_DMA9		53
+#define BCM6362_IRQ_ATM_DMA10		54
+#define BCM6362_IRQ_ATM_DMA11		55
+#define BCM6362_IRQ_ATM_DMA12		56
+#define BCM6362_IRQ_ATM_DMA13		57
+#define BCM6362_IRQ_ATM_DMA14		58
+#define BCM6362_IRQ_ATM_DMA15		59
+#define BCM6362_IRQ_ATM_DMA16		60
+#define BCM6362_IRQ_ATM_DMA17		61
+#define BCM6362_IRQ_ATM_DMA18		62		
+#define BCM6362_IRQ_ATM_DMA19		63
+
+#endif /* __DT_BINDINGS_INTERRUPT_CONTROLLER_BCM6362_H */
diff --git a/target/linux/bmips/files/include/dt-bindings/interrupt-controller/bcm6368-interrupt-controller.h b/target/linux/bmips/files/include/dt-bindings/interrupt-controller/bcm6368-interrupt-controller.h
new file mode 100644
index 0000000000..96a73d645e
--- /dev/null
+++ b/target/linux/bmips/files/include/dt-bindings/interrupt-controller/bcm6368-interrupt-controller.h
@@ -0,0 +1,71 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#ifndef __DT_BINDINGS_INTERRUPT_CONTROLLER_BCM6368_H
+#define __DT_BINDINGS_INTERRUPT_CONTROLLER_BCM6368_H
+
+#define BCM6368_IRQ_TIMER		0
+#define BCM6368_IRQ_SPI			1
+#define BCM6368_IRQ_UART0		2
+#define BCM6368_IRQ_UART1		3
+#define BCM6368_IRQ_XDSL		4
+#define BCM6368_IRQ_OHCI		5
+#define BCM6368_IRQ_IPSEC		6
+#define BCM6368_IRQ_EHCI		7
+#define BCM6368_IRQ_USBS		8
+#define BCM6368_IRQ_RING_OSC		9
+#define BCM6368_IRQ_NAND		10
+#define BCM6368_IRQ_ATM			11
+#define BCM6368_IRQ_PCM			12
+#define BCM6368_IRQ_MPI			13
+#define BCM6368_IRQ_DG			14
+#define BCM6368_IRQ_EPHY		15
+#define BCM6368_IRQ_EPHY_EN0		16
+#define BCM6368_IRQ_EPHY_EN1		17
+#define BCM6368_IRQ_EPHY_EN2		18
+#define BCM6368_IRQ_EPHY_EN3		19
+#define BCM6368_IRQ_EXT0		20
+#define BCM6368_IRQ_EXT1		21
+#define BCM6368_IRQ_EXT2		22
+#define BCM6368_IRQ_EXT3		23
+#define BCM6368_IRQ_EXT4		24
+#define BCM6368_IRQ_EXT5		25
+#define BCM6368_IRQ_USB_CTL_RX_DMA	26
+#define BCM6368_IRQ_USB_CTL_TX_DMA	27
+#define BCM6368_IRQ_USB_BULK_RX_DMA	28
+#define BCM6368_IRQ_USB_BULK_TX_DMA	29
+#define BCM6368_IRQ_USB_ISO_RX_DMA	30
+#define BCM6368_IRQ_USB_ISO_TX_DMA	31
+#define BCM6368_IRQ_ENETSW_RX_DMA0	32	
+#define BCM6368_IRQ_ENETSW_RX_DMA1	33	
+#define BCM6368_IRQ_ENETSW_RX_DMA2	34	
+#define BCM6368_IRQ_ENETSW_RX_DMA3	35	
+#define BCM6368_IRQ_ENETSW_TX_DMA0	36	
+#define BCM6368_IRQ_ENETSW_TX_DMA1	37	
+#define BCM6368_IRQ_ENETSW_TX_DMA2	38	
+#define BCM6368_IRQ_ENETSW_TX_DMA3	39	
+#define BCM6368_IRQ_ATM_DMA0		40
+#define BCM6368_IRQ_ATM_DMA1		41
+#define BCM6368_IRQ_ATM_DMA2		42
+#define BCM6368_IRQ_ATM_DMA3		43
+#define BCM6368_IRQ_ATM_DMA4		44
+#define BCM6368_IRQ_ATM_DMA5		45
+#define BCM6368_IRQ_ATM_DMA6		46
+#define BCM6368_IRQ_ATM_DMA7		47
+#define BCM6368_IRQ_ATM_DMA8		48
+#define BCM6368_IRQ_ATM_DMA9		49
+#define BCM6368_IRQ_ATM_DMA10		50
+#define BCM6368_IRQ_ATM_DMA11		51
+#define BCM6368_IRQ_ATM_DMA12		52
+#define BCM6368_IRQ_ATM_DMA13		53
+#define BCM6368_IRQ_ATM_DMA14		54
+#define BCM6368_IRQ_ATM_DMA15		55
+#define BCM6368_IRQ_ATM_DMA16		56
+#define BCM6368_IRQ_ATM_DMA17		57
+#define BCM6368_IRQ_ATM_DMA18		58
+#define BCM6368_IRQ_ATM_DMA19		59
+#define BCM6368_IRQ_IPSEC_DMA0		60
+#define BCM6368_IRQ_IPSEC_DMA1		61
+#define BCM6368_IRQ_PCM_DMA0		62
+#define BCM6368_IRQ_PCM_DMA1		63
+
+#endif /* __DT_BINDINGS_INTERRUPT_CONTROLLER_BCM6368_H */