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author | Álvaro Fernández Rojas <noltari@gmail.com> | 2021-02-21 10:00:18 +0100 |
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committer | Álvaro Fernández Rojas <noltari@gmail.com> | 2021-02-22 18:29:44 +0100 |
commit | 029093a302c9a66b74bec46285a179abd122a40a (patch) | |
tree | 505f9d21adf4f5d9acb51e7618f72cdbbc2d2ef9 /target/linux/bmips/image/lzma-loader/src/cache.c | |
parent | c27532742d8cae7b9c1a8c2fbfe5157e65a20877 (diff) | |
download | upstream-029093a302c9a66b74bec46285a179abd122a40a.tar.gz upstream-029093a302c9a66b74bec46285a179abd122a40a.tar.bz2 upstream-029093a302c9a66b74bec46285a179abd122a40a.zip |
bmips: add new target
This target has full device tree support, thus reducing the number of
patches needed for bcm63xx, in which there's a patch for every board.
The intention is to start with a minimal amount of downstream patches and
start upstreaming all of them.
Current status:
- Enabling EHCI/OHCI on BCM6358 causes a kernel panic.
- BCM63268 lacks Timer Clocks/Reset support.
- No PCI/PCIe drivers.
- No ethernet drivers.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Diffstat (limited to 'target/linux/bmips/image/lzma-loader/src/cache.c')
-rw-r--r-- | target/linux/bmips/image/lzma-loader/src/cache.c | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/target/linux/bmips/image/lzma-loader/src/cache.c b/target/linux/bmips/image/lzma-loader/src/cache.c new file mode 100644 index 0000000000..2c79c34a42 --- /dev/null +++ b/target/linux/bmips/image/lzma-loader/src/cache.c @@ -0,0 +1,42 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * LZMA compressed kernel loader for Atheros AR7XXX/AR9XXX based boards + * + * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org> + * + * The cache manipulation routine has been taken from the U-Boot project. + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, <wd@denx.de> + */ + +#include "cache.h" +#include "cacheops.h" +#include "config.h" +#include "printf.h" + +#define cache_op(op,addr) \ + __asm__ __volatile__( \ + " .set push \n" \ + " .set noreorder \n" \ + " .set mips3\n\t \n" \ + " cache %0, %1 \n" \ + " .set pop \n" \ + : \ + : "i" (op), "R" (*(unsigned char *)(addr))) + +void flush_cache(unsigned long start_addr, unsigned long size) +{ + unsigned long lsize = CONFIG_CACHELINE_SIZE; + unsigned long addr = start_addr & ~(lsize - 1); + unsigned long aend = (start_addr + size + (lsize - 1)) & ~(lsize - 1); + + printf("blasting from 0x%08x to 0x%08x (0x%08x - 0x%08x)\n", start_addr, size, addr, aend); + + while (1) { + cache_op(Hit_Writeback_Inv_D, addr); + cache_op(Hit_Invalidate_I, addr); + if (addr == aend) + break; + addr += lsize; + } +} |