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authorChuanhong Guo <gch981213@gmail.com>2018-08-12 21:13:31 +0800
committerMathias Kresin <dev@kresin.me>2018-08-13 08:37:19 +0200
commitcf50f720695eb2d9d232a588b5a7f4959ef3fcee (patch)
tree8f7a0efe94226da9beb1f30cd2532679636ae156 /target/linux/brcm47xx
parent42b3fdf9812f799c07bd30899a2bb2cff7d1a200 (diff)
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ath79: ar913x: fix eth pll register
PLL for eth0 internal clock on ar913x is at 0x18050014 and AR913X_ETH0_PLL_SHIFT is 20 instead of 17 Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
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