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author | Jonas Gorski <jogo@openwrt.org> | 2014-01-13 12:13:05 +0000 |
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committer | Jonas Gorski <jogo@openwrt.org> | 2014-01-13 12:13:05 +0000 |
commit | e854f846a1dfffee4499a0d68b5d7a11055db090 (patch) | |
tree | 732ecafa93b6d8c1b75ad0fcbb464ba60dc605d4 /target/linux/brcm63xx/patches-3.10/061-MIPS-allow-asm-cpu.h-to-be-included-from-assembly.patch | |
parent | d9d3c108635c56d2b3e3e88a0f2fc037d8e43917 (diff) | |
download | upstream-e854f846a1dfffee4499a0d68b5d7a11055db090.tar.gz upstream-e854f846a1dfffee4499a0d68b5d7a11055db090.tar.bz2 upstream-e854f846a1dfffee4499a0d68b5d7a11055db090.zip |
brcm63xx: update bmips patches with upstream submission
Update bmips cleanup patches with upstream submission and backport a few
bmips fixes.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@39267 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/brcm63xx/patches-3.10/061-MIPS-allow-asm-cpu.h-to-be-included-from-assembly.patch')
-rw-r--r-- | target/linux/brcm63xx/patches-3.10/061-MIPS-allow-asm-cpu.h-to-be-included-from-assembly.patch | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/target/linux/brcm63xx/patches-3.10/061-MIPS-allow-asm-cpu.h-to-be-included-from-assembly.patch b/target/linux/brcm63xx/patches-3.10/061-MIPS-allow-asm-cpu.h-to-be-included-from-assembly.patch new file mode 100644 index 0000000000..839cb4feca --- /dev/null +++ b/target/linux/brcm63xx/patches-3.10/061-MIPS-allow-asm-cpu.h-to-be-included-from-assembly.patch @@ -0,0 +1,31 @@ +From 72a1c3ad0392d7b42bf50e6ecade63a775166c73 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski <jogo@openwrt.org> +Date: Thu, 27 Jun 2013 21:32:41 +0200 +Subject: [PATCH V2 02/13] MIPS: allow asm/cpu.h to be included from assembly + +Add guards around the enum to allow including cpu.h from assembly. + +Signed-off-by: Jonas Gorski <jogo@openwrt.org> +--- + arch/mips/include/asm/cpu.h | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/arch/mips/include/asm/cpu.h ++++ b/arch/mips/include/asm/cpu.h +@@ -225,6 +225,8 @@ + + #define FPIR_IMP_NONE 0x0000 + ++#if !defined(__ASSEMBLY__) ++ + enum cpu_type_enum { + CPU_UNKNOWN, + +@@ -277,6 +279,7 @@ enum cpu_type_enum { + CPU_LAST + }; + ++#endif /* !__ASSEMBLY */ + + /* + * ISA Level encodings |