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author | Jonas Gorski <jogo@openwrt.org> | 2013-09-06 19:01:17 +0000 |
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committer | Jonas Gorski <jogo@openwrt.org> | 2013-09-06 19:01:17 +0000 |
commit | f8cd14921d9ae957a092378317bc11ededdeb0ef (patch) | |
tree | ddabb353f50dd7bfff81bb4b52bbbb9faaf86896 /target/linux/brcm63xx/patches-3.9/320-MIPS-BCM63XX-wire-up-the-second-CPU-s-irq-line.patch | |
parent | dc028776f0812f629546ef8081e2e30d9918ea36 (diff) | |
download | upstream-f8cd14921d9ae957a092378317bc11ededdeb0ef.tar.gz upstream-f8cd14921d9ae957a092378317bc11ededdeb0ef.tar.bz2 upstream-f8cd14921d9ae957a092378317bc11ededdeb0ef.zip |
brcm63xx: drop linux 3.9 support
It is EOL since quite a while, so no need to keep it around.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
SVN-Revision: 37911
Diffstat (limited to 'target/linux/brcm63xx/patches-3.9/320-MIPS-BCM63XX-wire-up-the-second-CPU-s-irq-line.patch')
-rw-r--r-- | target/linux/brcm63xx/patches-3.9/320-MIPS-BCM63XX-wire-up-the-second-CPU-s-irq-line.patch | 100 |
1 files changed, 0 insertions, 100 deletions
diff --git a/target/linux/brcm63xx/patches-3.9/320-MIPS-BCM63XX-wire-up-the-second-CPU-s-irq-line.patch b/target/linux/brcm63xx/patches-3.9/320-MIPS-BCM63XX-wire-up-the-second-CPU-s-irq-line.patch deleted file mode 100644 index 2d92c24635..0000000000 --- a/target/linux/brcm63xx/patches-3.9/320-MIPS-BCM63XX-wire-up-the-second-CPU-s-irq-line.patch +++ /dev/null @@ -1,100 +0,0 @@ -From 70c33fe0df8d14e40f3ca92ce56a668d66184858 Mon Sep 17 00:00:00 2001 -From: Jonas Gorski <jogo@openwrt.org> -Date: Fri, 26 Apr 2013 12:03:15 +0200 -Subject: [PATCH 12/14] MIPS: BCM63XX: wire up the second cpu's irq line - ---- - arch/mips/bcm63xx/irq.c | 50 ++++++++++++++++++++++++++++++++++++++--------- - 1 file changed, 41 insertions(+), 9 deletions(-) - ---- a/arch/mips/bcm63xx/irq.c -+++ b/arch/mips/bcm63xx/irq.c -@@ -363,13 +363,20 @@ static void __internal_irq_mask_##width( - u32 val; \ - unsigned reg = (irq / 32) ^ (width/32 - 1); \ - unsigned bit = irq & 0x1f; \ -- u32 irq_mask_addr = get_irq_mask_addr(0); \ - unsigned long flags; \ -+ int cpu; \ - \ - spin_lock_irqsave(&ipic_lock, flags); \ -- val = bcm_readl(irq_mask_addr + reg * sizeof(u32)); \ -- val &= ~(1 << bit); \ -- bcm_writel(val, irq_mask_addr + reg * sizeof(u32)); \ -+ for_each_present_cpu(cpu) { \ -+ u32 irq_mask_addr = get_irq_mask_addr(cpu); \ -+ \ -+ if (!irq_mask_addr) \ -+ break; \ -+ \ -+ val = bcm_readl(irq_mask_addr + reg * sizeof(u32)); \ -+ val &= ~(1 << bit); \ -+ bcm_writel(val, irq_mask_addr + reg * sizeof(u32)); \ -+ } \ - spin_unlock_irqrestore(&ipic_lock, flags); \ - } \ - \ -@@ -378,13 +385,23 @@ static void __internal_irq_unmask_##widt - u32 val; \ - unsigned reg = (irq / 32) ^ (width/32 - 1); \ - unsigned bit = irq & 0x1f; \ -- u32 irq_mask_addr = get_irq_mask_addr(0); \ - unsigned long flags; \ -+ int cpu; \ - \ - spin_lock_irqsave(&ipic_lock, flags); \ -- val = bcm_readl(irq_mask_addr + reg * sizeof(u32)); \ -- val |= (1 << bit); \ -- bcm_writel(val, irq_mask_addr + reg * sizeof(u32)); \ -+ for_each_present_cpu(cpu) { \ -+ u32 irq_mask_addr = get_irq_mask_addr(cpu); \ -+ \ -+ if (!irq_mask_addr) \ -+ break; \ -+ \ -+ val = bcm_readl(irq_mask_addr + reg * sizeof(u32)); \ -+ if (cpu_online(cpu)) \ -+ val |= (1 << bit); \ -+ else \ -+ val &= ~(1 << bit); \ -+ bcm_writel(val, irq_mask_addr + reg * sizeof(u32)); \ -+ } \ - spin_unlock_irqrestore(&ipic_lock, flags); \ - } - -@@ -409,7 +426,10 @@ asmlinkage void plat_irq_dispatch(void) - do_IRQ(1); - if (cause & CAUSEF_IP2) - dispatch_internal(0); -- if (!is_ext_irq_cascaded) { -+ if (is_ext_irq_cascaded) { -+ if (cause & CAUSEF_IP3) -+ dispatch_internal(1); -+ } else { - if (cause & CAUSEF_IP3) - do_IRQ(IRQ_EXT_0); - if (cause & CAUSEF_IP4) -@@ -622,6 +642,14 @@ static struct irqaction cpu_ip2_cascade_ - .flags = IRQF_NO_THREAD, - }; - -+#ifdef CONFIG_SMP -+static struct irqaction cpu_ip3_cascade_action = { -+ .handler = no_action, -+ .name = "cascade_ip3", -+ .flags = IRQF_NO_THREAD, -+}; -+#endif -+ - static struct irqaction cpu_ext_cascade_action = { - .handler = no_action, - .name = "cascade_extirq", -@@ -648,4 +676,8 @@ void __init arch_init_irq(void) - } - - setup_irq(MIPS_CPU_IRQ_BASE + 2, &cpu_ip2_cascade_action); -+#ifdef CONFIG_SMP -+ if (is_ext_irq_cascaded) -+ setup_irq(MIPS_CPU_IRQ_BASE + 3, &cpu_ip3_cascade_action); -+#endif - } |