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author | Koen Vandeputte <koen.vandeputte@ncentric.com> | 2019-01-28 10:05:10 +0100 |
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committer | Koen Vandeputte <koen.vandeputte@ncentric.com> | 2019-01-28 18:17:32 +0100 |
commit | c6bebe1a9496f9888e451a7f8aea6db916c0bdf2 (patch) | |
tree | 3072aa2d1d3c9af9a92eab2eefc0bafe0db754bc /target/linux/cns3xxx/patches-4.19/097-l2x0_cmdline_disable.patch | |
parent | 037800270bbb103819efce3f258bd0d7986b68a0 (diff) | |
download | upstream-c6bebe1a9496f9888e451a7f8aea6db916c0bdf2.tar.gz upstream-c6bebe1a9496f9888e451a7f8aea6db916c0bdf2.tar.bz2 upstream-c6bebe1a9496f9888e451a7f8aea6db916c0bdf2.zip |
cns3xxx: add support for kernel 4.19
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
Diffstat (limited to 'target/linux/cns3xxx/patches-4.19/097-l2x0_cmdline_disable.patch')
-rw-r--r-- | target/linux/cns3xxx/patches-4.19/097-l2x0_cmdline_disable.patch | 69 |
1 files changed, 69 insertions, 0 deletions
diff --git a/target/linux/cns3xxx/patches-4.19/097-l2x0_cmdline_disable.patch b/target/linux/cns3xxx/patches-4.19/097-l2x0_cmdline_disable.patch new file mode 100644 index 0000000000..b4720b11de --- /dev/null +++ b/target/linux/cns3xxx/patches-4.19/097-l2x0_cmdline_disable.patch @@ -0,0 +1,69 @@ +--- a/arch/arm/mach-cns3xxx/core.c ++++ b/arch/arm/mach-cns3xxx/core.c +@@ -307,13 +307,26 @@ void __init cns3xxx_timer_init(void) + + #ifdef CONFIG_CACHE_L2X0 + +-void __init cns3xxx_l2x0_init(void) ++static int cns3xxx_l2x0_enable = 1; ++ ++static int __init cns3xxx_l2x0_disable(char *s) ++{ ++ cns3xxx_l2x0_enable = 0; ++ return 1; ++} ++__setup("nol2x0", cns3xxx_l2x0_disable); ++ ++static int __init cns3xxx_l2x0_init(void) + { +- void __iomem *base = ioremap(CNS3XXX_L2C_BASE, SZ_4K); ++ void __iomem *base; + u32 val; + ++ if (!cns3xxx_l2x0_enable) ++ return 0; ++ ++ base = ioremap(CNS3XXX_L2C_BASE, SZ_4K); + if (WARN_ON(!base)) +- return; ++ return 0; + + /* + * Tag RAM Control register +@@ -343,7 +356,10 @@ void __init cns3xxx_l2x0_init(void) + + /* 32 KiB, 8-way, parity disable */ + l2x0_init(base, 0x00500000, 0xfe0f0fff); ++ ++ return 0; + } ++arch_initcall(cns3xxx_l2x0_init); + + #endif /* CONFIG_CACHE_L2X0 */ + +--- a/arch/arm/mach-cns3xxx/cns3420vb.c ++++ b/arch/arm/mach-cns3xxx/cns3420vb.c +@@ -217,8 +217,6 @@ static struct platform_device *cns3420_p + + static void __init cns3420_init(void) + { +- cns3xxx_l2x0_init(); +- + platform_add_devices(cns3420_pdevs, ARRAY_SIZE(cns3420_pdevs)); + + cns3xxx_ahci_init(); +--- a/arch/arm/mach-cns3xxx/core.h ++++ b/arch/arm/mach-cns3xxx/core.h +@@ -16,12 +16,6 @@ + extern struct smp_operations cns3xxx_smp_ops; + extern void cns3xxx_timer_init(void); + +-#ifdef CONFIG_CACHE_L2X0 +-void __init cns3xxx_l2x0_init(void); +-#else +-static inline void cns3xxx_l2x0_init(void) {} +-#endif /* CONFIG_CACHE_L2X0 */ +- + #ifdef CONFIG_PCI + extern void __init cns3xxx_pcie_init_late(void); + #else |