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authorKoen Vandeputte <koen.vandeputte@ncentric.com>2017-02-07 16:19:18 +0100
committerFelix Fietkau <nbd@nbd.name>2017-02-10 11:05:57 +0100
commit1db4135e32e03c0131301ed46d906a2bf8f08c9b (patch)
treef1da4a38a5ee6d7337843d9528f7e21fa61a006f /target/linux/cns3xxx/patches-4.9/040-fiq_support.patch
parentb96566aad4340c5b790bdaea0514885857ea84bf (diff)
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cns3xxx: add preliminary 4.9 support
Adds preliminary kernel 4.9 support for this target. - Refreshed/Updated all patches Added 3 new patches: - 093 --> Add virtual PCI MMIO mapping - 230 --> Remove deprecated code - 240 --> Rework AT24 eeprom code to use the new NVMEM API Compiled & tested on cns3xxx (gw2388) Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
Diffstat (limited to 'target/linux/cns3xxx/patches-4.9/040-fiq_support.patch')
-rw-r--r--target/linux/cns3xxx/patches-4.9/040-fiq_support.patch40
1 files changed, 40 insertions, 0 deletions
diff --git a/target/linux/cns3xxx/patches-4.9/040-fiq_support.patch b/target/linux/cns3xxx/patches-4.9/040-fiq_support.patch
new file mode 100644
index 0000000000..b391eb92d0
--- /dev/null
+++ b/target/linux/cns3xxx/patches-4.9/040-fiq_support.patch
@@ -0,0 +1,40 @@
+--- a/arch/arm/mach-cns3xxx/Kconfig
++++ b/arch/arm/mach-cns3xxx/Kconfig
+@@ -5,6 +5,7 @@ menuconfig ARCH_CNS3XXX
+ select HAVE_ARM_SCU if SMP
+ select HAVE_ARM_TWD
+ select HAVE_SMP
++ select FIQ
+ help
+ Support for Cavium Networks CNS3XXX platform.
+
+--- a/arch/arm/mach-cns3xxx/Makefile
++++ b/arch/arm/mach-cns3xxx/Makefile
+@@ -5,5 +5,5 @@ cns3xxx-y += core.o pm.o
+ cns3xxx-$(CONFIG_ATAGS) += devices.o
+ cns3xxx-$(CONFIG_PCI) += pcie.o
+ cns3xxx-$(CONFIG_MACH_CNS3420VB) += cns3420vb.o
+-cns3xxx-$(CONFIG_SMP) += platsmp.o headsmp.o
++cns3xxx-$(CONFIG_SMP) += platsmp.o headsmp.o cns3xxx_fiq.o
+ cns3xxx-$(CONFIG_HOTPLUG_CPU) += hotplug.o
+--- a/arch/arm/mach-cns3xxx/cns3xxx.h
++++ b/arch/arm/mach-cns3xxx/cns3xxx.h
+@@ -261,6 +261,7 @@
+ #define MISC_PCIE_INT_MASK(x) MISC_MEM_MAP(0x978 + (x) * 0x100)
+ #define MISC_PCIE_INT_STATUS(x) MISC_MEM_MAP(0x97C + (x) * 0x100)
+
++#define MISC_FIQ_CPU(x) MISC_MEM_MAP(0xA58 - (x) * 0x4)
+ /*
+ * Power management and clock control
+ */
+--- a/arch/arm/mm/Kconfig
++++ b/arch/arm/mm/Kconfig
+@@ -856,7 +856,7 @@ config VDSO
+
+ config DMA_CACHE_RWFO
+ bool "Enable read/write for ownership DMA cache maintenance"
+- depends on CPU_V6K && SMP
++ depends on CPU_V6K && SMP && !ARCH_CNS3XXX
+ default y
+ help
+ The Snoop Control Unit on ARM11MPCore does not detect the