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| author | Hauke Mehrtens <hauke@hauke-m.de> | 2020-02-29 16:49:09 +0100 |
|---|---|---|
| committer | Hauke Mehrtens <hauke@hauke-m.de> | 2020-03-12 09:28:23 +0100 |
| commit | 8334e04d24462b6fa3b53c77442a21f473149a1d (patch) | |
| tree | 679fbfabaf7b53bd3d359092c77eb46a8a09ec45 /target/linux/gemini/patches-4.14/0001-cache-patch-from-OpenWRT.patch | |
| parent | 7a6a85ce108c4883c0d99d5ecdd30512af11dff4 (diff) | |
| download | upstream-8334e04d24462b6fa3b53c77442a21f473149a1d.tar.gz upstream-8334e04d24462b6fa3b53c77442a21f473149a1d.tar.bz2 upstream-8334e04d24462b6fa3b53c77442a21f473149a1d.zip | |
gemini: Remove kernel 4.14 support
This target was switched to kernel 4.19 more than 6 months ago in commit
f342ffd300da ("treewide: kernel: bump some targets to 4.19") and now
with kernel 5.4 support being added it gets harder to support kernel
4.14 in addition to kernel 4.19 and 5.4.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Diffstat (limited to 'target/linux/gemini/patches-4.14/0001-cache-patch-from-OpenWRT.patch')
| -rw-r--r-- | target/linux/gemini/patches-4.14/0001-cache-patch-from-OpenWRT.patch | 50 |
1 files changed, 0 insertions, 50 deletions
diff --git a/target/linux/gemini/patches-4.14/0001-cache-patch-from-OpenWRT.patch b/target/linux/gemini/patches-4.14/0001-cache-patch-from-OpenWRT.patch deleted file mode 100644 index 4430ffee9d..0000000000 --- a/target/linux/gemini/patches-4.14/0001-cache-patch-from-OpenWRT.patch +++ /dev/null @@ -1,50 +0,0 @@ -From 57615e112aba6ae4c831d50e769c2c102f013686 Mon Sep 17 00:00:00 2001 -From: Linus Walleij <linus.walleij@linaro.org> -Date: Tue, 7 Jun 2016 22:53:24 +0200 -Subject: [PATCH 01/31] cache patch from OpenWRT - ---- - arch/arm/mm/cache-fa.S | 17 ++++++++++++++++- - 1 file changed, 16 insertions(+), 1 deletion(-) - ---- a/arch/arm/mm/cache-fa.S -+++ b/arch/arm/mm/cache-fa.S -@@ -24,7 +24,8 @@ - /* - * The size of one data cache line. - */ --#define CACHE_DLINESIZE 16 -+#define CACHE_DLINESIZE 16 -+#define CACHE_DLINESHIFT 4 - - /* - * The total size of the data cache. -@@ -169,7 +170,17 @@ ENTRY(fa_flush_kern_dcache_area) - * - start - virtual start address - * - end - virtual end address - */ -+__flush_whole_dcache: -+ mcr p15, 0, r0, c7, c14, 0 @ clean/invalidate D cache -+ mov r0, #0 -+ mcr p15, 0, r0, c7, c10, 4 @ drain write buffer -+ mov pc, lr -+ - fa_dma_inv_range: -+ sub r3, r1, r0 @ calculate total size -+ cmp r3, #CACHE_DLIMIT @ total size >= limit? -+ bhs __flush_whole_dcache @ flush whole D cache -+ - tst r0, #CACHE_DLINESIZE - 1 - bic r0, r0, #CACHE_DLINESIZE - 1 - mcrne p15, 0, r0, c7, c14, 1 @ clean & invalidate D entry -@@ -193,6 +204,10 @@ fa_dma_inv_range: - * - end - virtual end address - */ - fa_dma_clean_range: -+ sub r3, r1, r0 @ calculate total size -+ cmp r3, #CACHE_DLIMIT @ total size >= limit? -+ bhs __flush_whole_dcache @ flush whole D cache -+ - bic r0, r0, #CACHE_DLINESIZE - 1 - 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry - add r0, r0, #CACHE_DLINESIZE |