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authorImre Kaloz <kaloz@openwrt.org>2009-06-03 13:42:28 +0000
committerImre Kaloz <kaloz@openwrt.org>2009-06-03 13:42:28 +0000
commit6b2a7b73ca8ba542fd2cbd21c615933b99e293ba (patch)
treebe1f22c1565b6e16079e8f09a60bc3899fc6b0a2 /target/linux/gemini/patches
parent3d3d75a2489789df49a4985600f5cd5cb95dbaf8 (diff)
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upgrade to 2.6.30-rc8
SVN-Revision: 16307
Diffstat (limited to 'target/linux/gemini/patches')
-rw-r--r--target/linux/gemini/patches/001-git_sync.patch14
1 files changed, 7 insertions, 7 deletions
diff --git a/target/linux/gemini/patches/001-git_sync.patch b/target/linux/gemini/patches/001-git_sync.patch
index d36c5a277e..c408b6f588 100644
--- a/target/linux/gemini/patches/001-git_sync.patch
+++ b/target/linux/gemini/patches/001-git_sync.patch
@@ -189,8 +189,8 @@
.globl __kuser_helper_start
__kuser_helper_start:
-@@ -821,7 +822,7 @@ __kuser_memory_barrier: @ 0xffff0fa0
- #endif
+@@ -818,7 +819,7 @@ __kuser_memory_barrier: @ 0xffff0fa0
+ smp_dmb
usr_ret lr
- .align 5
@@ -198,7 +198,7 @@
/*
* Reference prototype:
-@@ -953,7 +954,7 @@ kuser_cmpxchg_fixup:
+@@ -950,7 +951,7 @@ kuser_cmpxchg_fixup:
#endif
@@ -207,7 +207,7 @@
/*
* Reference prototype:
-@@ -1035,7 +1036,7 @@ __kuser_helper_end:
+@@ -1032,7 +1033,7 @@ __kuser_helper_end:
* of which is copied into r0 for the mode specific abort handler.
*/
.macro vector_stub, name, mode, correction=0
@@ -216,7 +216,7 @@
vector_\name:
.if \correction
-@@ -1160,7 +1161,7 @@ __stubs_start:
+@@ -1157,7 +1158,7 @@ __stubs_start:
.long __und_invalid @ e
.long __und_invalid @ f
@@ -225,7 +225,7 @@
/*=============================================================================
* Undefined FIQs
-@@ -1190,7 +1191,7 @@ vector_addrexcptn:
+@@ -1187,7 +1188,7 @@ vector_addrexcptn:
* We group all the following data together to optimise
* for CPUs with separate I & D caches.
*/
@@ -850,7 +850,7 @@
+#endif /* __MACH_GMAC_H__ */
--- a/arch/arm/mach-gemini/include/mach/hardware.h
+++ b/arch/arm/mach-gemini/include/mach/hardware.h
-@@ -72,4 +72,12 @@
+@@ -71,4 +71,12 @@
*/
#define IO_ADDRESS(x) ((((x) & 0xFFF00000) >> 4) | ((x) & 0x000FFFFF) | 0xF0000000)