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authorRobert Marko <robert.marko@sartura.hr>2020-10-30 14:18:27 +0100
committerAdrian Schmutzler <freifunk@adrianschmutzler.de>2020-11-13 16:08:58 +0100
commit4f277b4da5238f0514ad48d7b98f9428f2b4b8a1 (patch)
tree6996a76c3ab005b50f24e159edaee0970fb1fec5 /target/linux/ipq40xx/patches-5.4/0002-02-v5.5-ARM-dts-qcom-ipq4019-Add-SDHCI-controller-node.patch
parenta8fb12a7d62c94fd1bbda332752e0f8c794f3702 (diff)
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ipq40xx: 5.4: update and reorder patches
A lot of patches are outdated versions of upstreamed patches and drivers. So lets pull in the upstreamed patches and reorder remaining ones. This drops the unnecessary 721-dts-ipq4019-add-ethernet-essedma-node.patch which adds nodes for not yet in OpenWrt IPQESS driver. Signed-off-by: Robert Marko <robert.marko@sartura.hr> [do not touch 902-dts-ipq4019-ap-dk04.1.patch here] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Diffstat (limited to 'target/linux/ipq40xx/patches-5.4/0002-02-v5.5-ARM-dts-qcom-ipq4019-Add-SDHCI-controller-node.patch')
-rw-r--r--target/linux/ipq40xx/patches-5.4/0002-02-v5.5-ARM-dts-qcom-ipq4019-Add-SDHCI-controller-node.patch36
1 files changed, 36 insertions, 0 deletions
diff --git a/target/linux/ipq40xx/patches-5.4/0002-02-v5.5-ARM-dts-qcom-ipq4019-Add-SDHCI-controller-node.patch b/target/linux/ipq40xx/patches-5.4/0002-02-v5.5-ARM-dts-qcom-ipq4019-Add-SDHCI-controller-node.patch
new file mode 100644
index 0000000000..25fce8daf0
--- /dev/null
+++ b/target/linux/ipq40xx/patches-5.4/0002-02-v5.5-ARM-dts-qcom-ipq4019-Add-SDHCI-controller-node.patch
@@ -0,0 +1,36 @@
+From 04b3b72b5b8fdb883bfdc619cb29b03641b1cc6a Mon Sep 17 00:00:00 2001
+From: Robert Marko <robimarko@gmail.com>
+Date: Thu, 15 Aug 2019 19:28:23 +0200
+Subject: [PATCH] ARM: dts: qcom: ipq4019: Add SDHCI controller node
+
+IPQ4019 has a built in SD/eMMC controller which is supported by the
+SDHCI MSM driver, by the "qcom,sdhci-msm-v4" binding.
+So lets add the appropriate node for it.
+
+Signed-off-by: Robert Marko <robimarko@gmail.com>
+Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+---
+ arch/arm/boot/dts/qcom-ipq4019.dtsi | 12 ++++++++++++
+ 1 file changed, 12 insertions(+)
+
+--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
++++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
+@@ -206,6 +206,18 @@
+ interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
++ sdhci: sdhci@7824900 {
++ compatible = "qcom,sdhci-msm-v4";
++ reg = <0x7824900 0x11c>, <0x7824000 0x800>;
++ interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
++ interrupt-names = "hc_irq", "pwr_irq";
++ bus-width = <8>;
++ clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>,
++ <&gcc GCC_DCD_XO_CLK>;
++ clock-names = "core", "iface", "xo";
++ status = "disabled";
++ };
++
+ blsp_dma: dma@7884000 {
+ compatible = "qcom,bam-v1.7.0";
+ reg = <0x07884000 0x23000>;