ipq806x: disentangle and clean up SoC DTSI files

So far, the DTSI files on ipq806x had a linear inheritance:

  qcom-ipq8064.dtsi
  v
  qcom-ipq8064-v1.0.dtsi
  v
  qcom-ipq8064-v2.0.dtsi
  v
  qcom-ipq8065.dtsi

This poses problems when one wants to set something that is specific
to an architecture closer to the top of the tree.

In this patch, we remove the chain-like inheritance and have all
other files derived from qcom-ipq8064.dtsi (changing this name to
something more generic is not possible due to upstream use).

The removal of inheritance will require a few entries to be copied
from qcom-ipq8064-v2.0.dtsi to qcom-ipq8065.dtsi. However, it also
opens an opportunity for some clean-up:

- Many definitions can be improved by just using the innermost labels.

- Instead of disabling the CPU_SPC node for ipq8065, it is now off by
  default and enabled where needed.

- Instead of patching phy-tx0-term-offset into qcom-ipq8064.dtsi and
  then having it changed for qcom-ipq8064-v2.0/qcom-ipq8065, just have
  the appropriate settings done in the lower DTSI files directly.

- For the opp_table0 adjustments for ipq8065, just redefine what's
  changed, but don't add all the untouched properties again.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>

1 files changed, 12 insertions, 13 deletions

diff --git a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi
index dd272c7fc7..467c43590b 100644
--- a/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi
+++ b/target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi
@@ -1,20 +1,19 @@
-#include "qcom-ipq8064-v1.0.dtsi"
+#include "qcom-ipq8064.dtsi"
 
-/ {
-	soc: soc {
+&CPU_SPC {
+	status = "okay";
+};
 
-		pcie0: pci@1b500000 {
-			phy-tx0-term-offset = <0>;
-		};
+&pcie0 {
+	phy-tx0-term-offset = <0>;
+};
 
-		pcie1: pci@1b700000 {
-			phy-tx0-term-offset = <0>;
-		};
+&pcie1 {
+	phy-tx0-term-offset = <0>;
+};
 
-		pcie2: pci@1b900000 {
-			phy-tx0-term-offset = <0>;
-		};
-	};
+&pcie2 {
+	phy-tx0-term-offset = <0>;
 };
 
 &ss_phy_0 {