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author | Christian Lamparter <chunkeey@gmail.com> | 2019-11-28 22:28:48 +0100 |
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committer | Petr Štetiar <ynezz@true.cz> | 2019-12-19 22:41:57 +0100 |
commit | 63066d3006958ca52df71f53c6f413ad4fb74974 (patch) | |
tree | 08dd597a38f839e6a14f20fadc6e1d39c69fe3f0 /target/linux/ipq806x/patches-4.19/0040-clk-qcom-Add-IPQ806X-s-HFPLLs.patch | |
parent | 53801ae1c79ecf5153d658951e3c3afed4a16d93 (diff) | |
download | upstream-63066d3006958ca52df71f53c6f413ad4fb74974.tar.gz upstream-63066d3006958ca52df71f53c6f413ad4fb74974.tar.bz2 upstream-63066d3006958ca52df71f53c6f413ad4fb74974.zip |
ipq806x: refresh 4.19 patches
Reworked:
- 0034 patchset update
Added:
- 080 Add support for pinctrl-msm framework
Removed:
- 0074-ipq806x-usb-Control-USB-master-reset.patch
(we now have a dedicated driver for qcom usb)
- 0047-mtd-nand-Create-a-BBT-flag-to-access-bad-block-marke
(merged upstream)
- 310-msm-adhoc-bus-support
(it looks like it was never actually used in any dts)
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
[commit subject and description facelift, SoB fix]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Diffstat (limited to 'target/linux/ipq806x/patches-4.19/0040-clk-qcom-Add-IPQ806X-s-HFPLLs.patch')
-rw-r--r-- | target/linux/ipq806x/patches-4.19/0040-clk-qcom-Add-IPQ806X-s-HFPLLs.patch | 129 |
1 files changed, 0 insertions, 129 deletions
diff --git a/target/linux/ipq806x/patches-4.19/0040-clk-qcom-Add-IPQ806X-s-HFPLLs.patch b/target/linux/ipq806x/patches-4.19/0040-clk-qcom-Add-IPQ806X-s-HFPLLs.patch deleted file mode 100644 index c3af0fa55c..0000000000 --- a/target/linux/ipq806x/patches-4.19/0040-clk-qcom-Add-IPQ806X-s-HFPLLs.patch +++ /dev/null @@ -1,129 +0,0 @@ -From patchwork Fri Dec 8 09:42:24 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v4,06/12] clk: qcom: Add IPQ806X's HFPLLs -From: Sricharan R <sricharan@codeaurora.org> -X-Patchwork-Id: 10102047 -Message-Id: <1512726150-7204-7-git-send-email-sricharan@codeaurora.org> -To: mturquette@baylibre.com, sboyd@codeaurora.org, - devicetree@vger.kernel.org, linux-pm@vger.kernel.org, - linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, - viresh.kumar@linaro.org, linux-arm-kernel@lists.infradead.org -Cc: sricharan@codeaurora.org -Date: Fri, 8 Dec 2017 15:12:24 +0530 - -From: Stephen Boyd <sboyd@codeaurora.org> - -Describe the HFPLLs present on IPQ806X devices. - -Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> ---- - drivers/clk/qcom/gcc-ipq806x.c | 82 ++++++++++++++++++++++++++++++++++++++++++ - 1 file changed, 82 insertions(+) - ---- a/drivers/clk/qcom/gcc-ipq806x.c -+++ b/drivers/clk/qcom/gcc-ipq806x.c -@@ -30,6 +30,7 @@ - #include "clk-pll.h" - #include "clk-rcg.h" - #include "clk-branch.h" -+#include "clk-hfpll.h" - #include "reset.h" - - static struct clk_pll pll0 = { -@@ -113,6 +114,84 @@ static struct clk_regmap pll8_vote = { - }, - }; - -+static struct hfpll_data hfpll0_data = { -+ .mode_reg = 0x3200, -+ .l_reg = 0x3208, -+ .m_reg = 0x320c, -+ .n_reg = 0x3210, -+ .config_reg = 0x3204, -+ .status_reg = 0x321c, -+ .config_val = 0x7845c665, -+ .droop_reg = 0x3214, -+ .droop_val = 0x0108c000, -+ .min_rate = 600000000UL, -+ .max_rate = 1800000000UL, -+}; -+ -+static struct clk_hfpll hfpll0 = { -+ .d = &hfpll0_data, -+ .clkr.hw.init = &(struct clk_init_data){ -+ .parent_names = (const char *[]){ "pxo" }, -+ .num_parents = 1, -+ .name = "hfpll0", -+ .ops = &clk_ops_hfpll, -+ .flags = CLK_IGNORE_UNUSED, -+ }, -+ .lock = __SPIN_LOCK_UNLOCKED(hfpll0.lock), -+}; -+ -+static struct hfpll_data hfpll1_data = { -+ .mode_reg = 0x3240, -+ .l_reg = 0x3248, -+ .m_reg = 0x324c, -+ .n_reg = 0x3250, -+ .config_reg = 0x3244, -+ .status_reg = 0x325c, -+ .config_val = 0x7845c665, -+ .droop_reg = 0x3314, -+ .droop_val = 0x0108c000, -+ .min_rate = 600000000UL, -+ .max_rate = 1800000000UL, -+}; -+ -+static struct clk_hfpll hfpll1 = { -+ .d = &hfpll1_data, -+ .clkr.hw.init = &(struct clk_init_data){ -+ .parent_names = (const char *[]){ "pxo" }, -+ .num_parents = 1, -+ .name = "hfpll1", -+ .ops = &clk_ops_hfpll, -+ .flags = CLK_IGNORE_UNUSED, -+ }, -+ .lock = __SPIN_LOCK_UNLOCKED(hfpll1.lock), -+}; -+ -+static struct hfpll_data hfpll_l2_data = { -+ .mode_reg = 0x3300, -+ .l_reg = 0x3308, -+ .m_reg = 0x330c, -+ .n_reg = 0x3310, -+ .config_reg = 0x3304, -+ .status_reg = 0x331c, -+ .config_val = 0x7845c665, -+ .droop_reg = 0x3314, -+ .droop_val = 0x0108c000, -+ .min_rate = 600000000UL, -+ .max_rate = 1800000000UL, -+}; -+ -+static struct clk_hfpll hfpll_l2 = { -+ .d = &hfpll_l2_data, -+ .clkr.hw.init = &(struct clk_init_data){ -+ .parent_names = (const char *[]){ "pxo" }, -+ .num_parents = 1, -+ .name = "hfpll_l2", -+ .ops = &clk_ops_hfpll, -+ .flags = CLK_IGNORE_UNUSED, -+ }, -+ .lock = __SPIN_LOCK_UNLOCKED(hfpll_l2.lock), -+}; -+ - static struct clk_pll pll14 = { - .l_reg = 0x31c4, - .m_reg = 0x31c8, -@@ -2801,6 +2880,9 @@ static struct clk_regmap *gcc_ipq806x_cl - [UBI32_CORE2_CLK_SRC] = &ubi32_core2_src_clk.clkr, - [NSSTCM_CLK_SRC] = &nss_tcm_src.clkr, - [NSSTCM_CLK] = &nss_tcm_clk.clkr, -+ [PLL9] = &hfpll0.clkr, -+ [PLL10] = &hfpll1.clkr, -+ [PLL12] = &hfpll_l2.clkr, - }; - - static const struct qcom_reset_map gcc_ipq806x_resets[] = { |