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author | John Crispin <john@phrozen.org> | 2017-02-16 12:25:25 +0100 |
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committer | John Crispin <john@phrozen.org> | 2017-02-16 20:25:32 +0100 |
commit | bb255f74290d889b65a563bac7a4be0427fdbec8 (patch) | |
tree | 94eba9e702b4ed6203ee4aecb1bcd5778dde01b1 /target/linux/ipq806x/patches-4.9/0004-arm-qcom-dts-Add-NAND-controller-node-for-ipq806x.patch | |
parent | 04c4b6f7fd1c48c09333ba0051ad24a6905491a0 (diff) | |
download | upstream-bb255f74290d889b65a563bac7a4be0427fdbec8.tar.gz upstream-bb255f74290d889b65a563bac7a4be0427fdbec8.tar.bz2 upstream-bb255f74290d889b65a563bac7a4be0427fdbec8.zip |
ipq806x: add v4.9 support
Signed-off-by: John Crispin <john@phrozen.org>
Diffstat (limited to 'target/linux/ipq806x/patches-4.9/0004-arm-qcom-dts-Add-NAND-controller-node-for-ipq806x.patch')
-rw-r--r-- | target/linux/ipq806x/patches-4.9/0004-arm-qcom-dts-Add-NAND-controller-node-for-ipq806x.patch | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/target/linux/ipq806x/patches-4.9/0004-arm-qcom-dts-Add-NAND-controller-node-for-ipq806x.patch b/target/linux/ipq806x/patches-4.9/0004-arm-qcom-dts-Add-NAND-controller-node-for-ipq806x.patch new file mode 100644 index 0000000000..4fd75c9345 --- /dev/null +++ b/target/linux/ipq806x/patches-4.9/0004-arm-qcom-dts-Add-NAND-controller-node-for-ipq806x.patch @@ -0,0 +1,38 @@ +From c6d45af259eb4fb2a598c0396c6dd580b1658558 Mon Sep 17 00:00:00 2001 +From: Thomas Pedersen <twp@codeaurora.org> +Date: Mon, 16 May 2016 17:58:53 -0700 +Subject: [PATCH 04/37] arm: qcom: dts: Add NAND controller node for ipq806x + +Original patch by Archit Taneja. + +Signed-off-by: Archit Taneja <architt@codeaurora.org> +Signed-off-by: Thomas Pedersen <twp@codeaurora.org> +--- + arch/arm/boot/dts/qcom-ipq8064.dtsi | 17 +++++++++++++++++ + 1 file changed, 17 insertions(+) + +--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi ++++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi +@@ -363,5 +363,22 @@ + + status = "disabled"; + }; ++ ++ nand@1ac00000 { ++ compatible = "qcom,ipq806x-nand"; ++ reg = <0x1ac00000 0x800>; ++ ++ clocks = <&gcc EBI2_CLK>, ++ <&gcc EBI2_AON_CLK>; ++ clock-names = "core", "aon"; ++ ++ dmas = <&adm_dma 3>; ++ dma-names = "rxtx"; ++ qcom,cmd-crci = <15>; ++ qcom,data-crci = <3>; ++ ++ status = "disabled"; ++ }; ++ + }; + }; |