aboutsummaryrefslogtreecommitdiffstats
path: root/target/linux/lantiq/files/arch
diff options
context:
space:
mode:
authorAndreas Böhler <dev@aboehler.at>2020-01-23 21:20:38 +0100
committerHauke Mehrtens <hauke@hauke-m.de>2021-04-03 18:56:51 +0200
commit73ec21cde2cde1fc27f66b08e8762cdc3c78b61a (patch)
treefa9c13cc520f3007db1f761388b4bc25fd55ad45 /target/linux/lantiq/files/arch
parent754eb75a8c9ef318fa01adb1d5b9054954ee3913 (diff)
downloadupstream-73ec21cde2cde1fc27f66b08e8762cdc3c78b61a.tar.gz
upstream-73ec21cde2cde1fc27f66b08e8762cdc3c78b61a.tar.bz2
upstream-73ec21cde2cde1fc27f66b08e8762cdc3c78b61a.zip
lantiq: add basic support for AVM FRITZ!Box 3390
The FRITZ!Box 3390 actually contains two SoCs, one Lantiq with a 5GHz WiFi and one AR9342 with a 2.4GHz WiFi. Only the Lantiq has access to the flash memory, the Atheros runs fully from RAM. Specifications -------------- - Lantiq 500 MHz - 128MiB RAM - 128MiB NAND - 256k Flash - AR9580 5GHz WiFi - AR9342 560 MHz - 64MiB RAM - AR9328 2.4GHz WiFi Remarks ------- This commit only adds support for the Lantiq side of things and prepares the drivers for communication with the Atheros SoC. Thus, only 5GHz WiFi works by default, the 2.4GHz WiFi will be added via another target. Some kernel patches will be required to add support for the Atheros SoC. Installation ------------ Use the eva_ramboot.py script to boot the initramfs image. Then, transfer the sysupgrade image to the device and run sysupgrade to flash it to the NAND. Signed-off-by: Andreas Böhler <dev@aboehler.at> Acked-by: Aleksander Jan Bajkowski A.Bajkowski@stud.elka.pw.edu.pl Signed-off-by: Joachim Cerny <cocktail_yogi@web.de>
Diffstat (limited to 'target/linux/lantiq/files/arch')
-rw-r--r--target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz3390.dts308
1 files changed, 308 insertions, 0 deletions
diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz3390.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz3390.dts
new file mode 100644
index 0000000000..09c97a6454
--- /dev/null
+++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz3390.dts
@@ -0,0 +1,308 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "vr9.dtsi"
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/mips/lantiq_rcu_gphy.h>
+
+/ {
+ compatible = "avm,fritz3390", "lantiq,xway", "lantiq,vr9";
+ model = "AVM FRITZ!Box 3390";
+
+ chosen {
+ bootargs = "console=ttyLTQ0,115200";
+ };
+
+ aliases {
+ led-boot = &led_power_green;
+ led-failsafe = &led_power_red;
+ led-running = &led_power_green;
+ led-upgrade = &led_power_red;
+
+ led-dsl = &led_dsl;
+ led-internet = &led_info;
+ led-wifi = &led_wifi;
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x8000000>;
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ poll-interval = <100>;
+
+ power {
+ label = "power";
+ gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
+ linux,code = <KEY_POWER>;
+ };
+
+ wifi {
+ label = "wifi";
+ gpios = <&gpio 29 GPIO_ACTIVE_HIGH>;
+ linux,code = <KEY_RFKILL>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led_power_green: power_green {
+ label = "green:power";
+ gpios = <&gpio 45 GPIO_ACTIVE_LOW>;
+ default-state = "keep";
+ };
+
+ led_power_red: power_red {
+ label = "red:power";
+ gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
+ };
+
+ led_wifi: wifi {
+ label = "green:wifi";
+ gpios = <&gpio 36 GPIO_ACTIVE_LOW>;
+ };
+
+ led_dsl: dsl {
+ label = "green:dsl";
+ gpios = <&gpio 35 GPIO_ACTIVE_LOW>;
+ };
+
+ led_lan {
+ label = "green:lan";
+ gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
+ };
+
+ led_info: info {
+ label = "green:info";
+ gpios = <&gpio 33 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ usb0_vbus: regulator-usb0-vbus {
+ compatible = "regulator-fixed";
+
+ regulator-name = "USB0_VBUS";
+
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+
+ gpio = <&gpio 14 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ usb1_vbus: regulator-usb1-vbus {
+ compatible = "regulator-fixed";
+
+ regulator-name = "USB1_VBUS";
+
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+
+ gpio = <&gpio 5 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+};
+
+&eth0 {
+ interface@0 {
+ compatible = "lantiq,xrx200-pdi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ lantiq,switch;
+
+ ethernet@0 {
+ compatible = "lantiq,xrx200-pdi-port";
+ reg = <0>;
+ phy-mode = "rgmii";
+ phy-handle = <&phy0>;
+ gpios = <&gpio 32 GPIO_ACTIVE_HIGH>;
+ };
+
+ ethernet@1 {
+ compatible = "lantiq,xrx200-pdi-port";
+ reg = <1>;
+ phy-mode = "rgmii";
+ phy-handle = <&phy1>;
+ gpios = <&gpio 44 GPIO_ACTIVE_HIGH>;
+ };
+
+ ethernet@2 {
+ compatible = "lantiq,xrx200-pdi-port";
+ reg = <2>;
+ phy-mode = "gmii";
+ phy-handle = <&phy11>;
+ };
+
+ ethernet@4 {
+ compatible = "lantiq,xrx200-pdi-port";
+ reg = <4>;
+ phy-mode = "gmii";
+ phy-handle = <&phy13>;
+ };
+ };
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "lantiq,xrx200-mdio";
+
+ phy0: ethernet-phy@0 {
+ reg = <0x0>;
+ compatible = "ethernet-phy-ieee802.3-c22";
+ };
+
+ phy1: ethernet-phy@1 {
+ reg = <0x1>;
+ compatible = "ethernet-phy-ieee802.3-c22";
+ };
+
+ phy11: ethernet-phy@11 {
+ reg = <0x11>;
+ compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+ };
+
+ phy13: ethernet-phy@13 {
+ reg = <0x13>;
+ compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+ };
+ };
+};
+
+&gphy0 {
+ lantiq,gphy-mode = <GPHY_MODE_GE>;
+};
+
+&gphy1 {
+ lantiq,gphy-mode = <GPHY_MODE_GE>;
+};
+
+&gpio {
+ pinctrl-names = "default";
+ pinctrl-0 = <&state_default>;
+
+ state_default: pinmux {
+ phy-rst {
+ lantiq,pins = "io32", "io44";
+ lantiq,pull = <0>;
+ lantiq,open-drain;
+ lantiq,output = <1>;
+ };
+
+ pcie-rst {
+ lantiq,pins = "io21";
+ lantiq,open-drain;
+ lantiq,output = <1>;
+ };
+ };
+
+ pcie-rst-dev {
+ gpio-hog;
+ line-name = "pcie-rst-dev";
+ gpios = <22 GPIO_ACTIVE_LOW>;
+ output-low;
+ };
+};
+
+&spi {
+ status = "okay";
+
+ flash@4 {
+ compatible = "jedec,spi-nor";
+ reg = <4>;
+ spi-max-frequency = <10000000>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ reg = <0x0 0x20000>;
+ label = "urlader";
+ read-only;
+ };
+
+ partition@20000 {
+ reg = <0x20000 0x10000>;
+ label = "tffs (1)";
+ read-only;
+ };
+
+ partition@30000 {
+ reg = <0x30000 0x10000>;
+ label = "tffs (2)";
+ read-only;
+ };
+ };
+ };
+};
+
+&localbus {
+ flash@1 {
+ compatible = "lantiq,nand-xway";
+ bank-width = <1>;
+ reg = <1 0x0 0x2000000>;
+
+ pinctrl-0 = <&nand_pins>;
+ pinctrl-names = "default";
+
+ nand-ecc-mode = "on-die";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "kernel";
+ reg = <0x0 0x400000>;
+ };
+
+ partition@400000 {
+ label = "ubi";
+ reg = <0x400000 0x7c00000>;
+ };
+ };
+ };
+};
+
+&usb_phy0 {
+ status = "okay";
+};
+
+&usb_phy1 {
+ status = "okay";
+};
+
+&usb0 {
+ status = "okay";
+ vbus-supply = <&usb0_vbus>;
+};
+
+&usb1 {
+ status = "okay";
+ vbus-supply = <&usb1_vbus>;
+};
+
+&pcie0 {
+ status = "okay";
+ gpio-reset = <&gpio 21 GPIO_ACTIVE_LOW>;
+
+ pcie@0 {
+ reg = <0 0 0 0 0>;
+ #interrupt-cells = <1>;
+ #size-cells = <1>;
+ #address-cells = <2>;
+ device_type = "pci";
+
+ wifi@0,0 {
+ compatible = "pci168c,0033";
+ reg = <0 0 0 0 0>;
+ qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */
+ };
+ };
+};