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author | Yangbo Lu <yangbo.lu@nxp.com> | 2020-04-10 10:47:05 +0800 |
---|---|---|
committer | Petr Štetiar <ynezz@true.cz> | 2020-05-07 12:53:06 +0200 |
commit | cddd4591404fb4c53dc0b3c0b15b942cdbed4356 (patch) | |
tree | 392c1179de46b0f804e3789edca19069b64e6b44 /target/linux/layerscape/patches-5.4/302-dts-0048-arm64-dts-freescale-lx2160a-add-pcie-EP-mode-DT-node.patch | |
parent | d1d2c0b5579ea4f69a42246c9318539d61ba1999 (diff) | |
download | upstream-cddd4591404fb4c53dc0b3c0b15b942cdbed4356.tar.gz upstream-cddd4591404fb4c53dc0b3c0b15b942cdbed4356.tar.bz2 upstream-cddd4591404fb4c53dc0b3c0b15b942cdbed4356.zip |
layerscape: add patches-5.4
Add patches for linux-5.4. The patches are from NXP LSDK-20.04 release
which was tagged LSDK-20.04-V5.4.
https://source.codeaurora.org/external/qoriq/qoriq-components/linux/
For boards LS1021A-IOT, and Traverse-LS1043 which are not involved in
LSDK, port the dts patches from 4.14.
The patches are sorted into the following categories:
301-arch-xxxx
302-dts-xxxx
303-core-xxxx
701-net-xxxx
801-audio-xxxx
802-can-xxxx
803-clock-xxxx
804-crypto-xxxx
805-display-xxxx
806-dma-xxxx
807-gpio-xxxx
808-i2c-xxxx
809-jailhouse-xxxx
810-keys-xxxx
811-kvm-xxxx
812-pcie-xxxx
813-pm-xxxx
814-qe-xxxx
815-sata-xxxx
816-sdhc-xxxx
817-spi-xxxx
818-thermal-xxxx
819-uart-xxxx
820-usb-xxxx
821-vfio-xxxx
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Diffstat (limited to 'target/linux/layerscape/patches-5.4/302-dts-0048-arm64-dts-freescale-lx2160a-add-pcie-EP-mode-DT-node.patch')
-rw-r--r-- | target/linux/layerscape/patches-5.4/302-dts-0048-arm64-dts-freescale-lx2160a-add-pcie-EP-mode-DT-node.patch | 112 |
1 files changed, 112 insertions, 0 deletions
diff --git a/target/linux/layerscape/patches-5.4/302-dts-0048-arm64-dts-freescale-lx2160a-add-pcie-EP-mode-DT-node.patch b/target/linux/layerscape/patches-5.4/302-dts-0048-arm64-dts-freescale-lx2160a-add-pcie-EP-mode-DT-node.patch new file mode 100644 index 0000000000..5a70597457 --- /dev/null +++ b/target/linux/layerscape/patches-5.4/302-dts-0048-arm64-dts-freescale-lx2160a-add-pcie-EP-mode-DT-node.patch @@ -0,0 +1,112 @@ +From 4de7a5e35eff9216fa5e6b138b0ffa75e045e397 Mon Sep 17 00:00:00 2001 +From: Xiaowei Bao <xiaowei.bao@nxp.com> +Date: Thu, 28 Feb 2019 14:09:01 +0800 +Subject: [PATCH] arm64: dts: freescale: lx2160a: add pcie EP mode DT nodes + +The LX2160A PCIe EP mode node. + +Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> +--- + arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 56 ++++++++++++++++++++++++++ + 1 file changed, 56 insertions(+) + +--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi ++++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi +@@ -932,6 +932,15 @@ + status = "disabled"; + }; + ++ pcie_ep@3400000 { ++ compatible = "fsl,lx2160a-pcie-ep"; ++ reg = <0x00 0x03400000 0x0 0x00100000 ++ 0x80 0x00000000 0x8 0x00000000>; ++ reg-names = "regs", "addr_space"; ++ num-ob-windows = <256>; ++ status = "disabled"; ++ }; ++ + pcie@3500000 { + compatible = "fsl,lx2160a-pcie"; + reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */ +@@ -959,6 +968,15 @@ + status = "disabled"; + }; + ++ pcie_ep@3500000 { ++ compatible = "fsl,lx2160a-pcie-ep"; ++ reg = <0x00 0x03500000 0x0 0x00100000 ++ 0x88 0x00000000 0x8 0x00000000>; ++ reg-names = "regs", "addr_space"; ++ num-ob-windows = <256>; ++ status = "disabled"; ++ }; ++ + pcie@3600000 { + compatible = "fsl,lx2160a-pcie"; + reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */ +@@ -986,6 +1004,16 @@ + status = "disabled"; + }; + ++ pcie_ep@3600000 { ++ compatible = "fsl,lx2160a-pcie-ep"; ++ reg = <0x00 0x03600000 0x0 0x00100000 ++ 0x90 0x00000000 0x8 0x00000000>; ++ reg-names = "regs", "addr_space"; ++ num-ob-windows = <256>; ++ max-functions = <2>; ++ status = "disabled"; ++ }; ++ + pcie@3700000 { + compatible = "fsl,lx2160a-pcie"; + reg = <0x00 0x03700000 0x0 0x00100000 /* controller registers */ +@@ -1013,6 +1041,15 @@ + status = "disabled"; + }; + ++ pcie_ep@3700000 { ++ compatible = "fsl,lx2160a-pcie-ep"; ++ reg = <0x00 0x03700000 0x0 0x00100000 ++ 0x98 0x00000000 0x8 0x00000000>; ++ reg-names = "regs", "addr_space"; ++ num-ob-windows = <256>; ++ status = "disabled"; ++ }; ++ + pcie@3800000 { + compatible = "fsl,lx2160a-pcie"; + reg = <0x00 0x03800000 0x0 0x00100000 /* controller registers */ +@@ -1040,6 +1077,16 @@ + status = "disabled"; + }; + ++ pcie_ep@3800000 { ++ compatible = "fsl,lx2160a-pcie-ep"; ++ reg = <0x00 0x03800000 0x0 0x00100000 ++ 0xa0 0x00000000 0x8 0x00000000>; ++ reg-names = "regs", "addr_space"; ++ num-ob-windows = <256>; ++ max-functions = <2>; ++ status = "disabled"; ++ }; ++ + pcie@3900000 { + compatible = "fsl,lx2160a-pcie"; + reg = <0x00 0x03900000 0x0 0x00100000 /* controller registers */ +@@ -1067,6 +1114,15 @@ + status = "disabled"; + }; + ++ pcie_ep@3900000 { ++ compatible = "fsl,lx2160a-pcie-ep"; ++ reg = <0x00 0x03900000 0x0 0x00100000 ++ 0xa8 0x00000000 0x8 0x00000000>; ++ reg-names = "regs", "addr_space"; ++ num-ob-windows = <256>; ++ status = "disabled"; ++ }; ++ + smmu: iommu@5000000 { + compatible = "arm,mmu-500"; + reg = <0 0x5000000 0 0x800000>; |