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authorYangbo Lu <yangbo.lu@nxp.com>2020-04-10 10:47:05 +0800
committerPetr Štetiar <ynezz@true.cz>2020-05-07 12:53:06 +0200
commitcddd4591404fb4c53dc0b3c0b15b942cdbed4356 (patch)
tree392c1179de46b0f804e3789edca19069b64e6b44 /target/linux/layerscape/patches-5.4/302-dts-0053-sdk-arm64-dts-nxp-add-DPAA1-SDK-flavor-dts-files.patch
parentd1d2c0b5579ea4f69a42246c9318539d61ba1999 (diff)
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layerscape: add patches-5.4
Add patches for linux-5.4. The patches are from NXP LSDK-20.04 release which was tagged LSDK-20.04-V5.4. https://source.codeaurora.org/external/qoriq/qoriq-components/linux/ For boards LS1021A-IOT, and Traverse-LS1043 which are not involved in LSDK, port the dts patches from 4.14. The patches are sorted into the following categories: 301-arch-xxxx 302-dts-xxxx 303-core-xxxx 701-net-xxxx 801-audio-xxxx 802-can-xxxx 803-clock-xxxx 804-crypto-xxxx 805-display-xxxx 806-dma-xxxx 807-gpio-xxxx 808-i2c-xxxx 809-jailhouse-xxxx 810-keys-xxxx 811-kvm-xxxx 812-pcie-xxxx 813-pm-xxxx 814-qe-xxxx 815-sata-xxxx 816-sdhc-xxxx 817-spi-xxxx 818-thermal-xxxx 819-uart-xxxx 820-usb-xxxx 821-vfio-xxxx Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Diffstat (limited to 'target/linux/layerscape/patches-5.4/302-dts-0053-sdk-arm64-dts-nxp-add-DPAA1-SDK-flavor-dts-files.patch')
-rw-r--r--target/linux/layerscape/patches-5.4/302-dts-0053-sdk-arm64-dts-nxp-add-DPAA1-SDK-flavor-dts-files.patch187
1 files changed, 187 insertions, 0 deletions
diff --git a/target/linux/layerscape/patches-5.4/302-dts-0053-sdk-arm64-dts-nxp-add-DPAA1-SDK-flavor-dts-files.patch b/target/linux/layerscape/patches-5.4/302-dts-0053-sdk-arm64-dts-nxp-add-DPAA1-SDK-flavor-dts-files.patch
new file mode 100644
index 0000000000..1e1b805ffb
--- /dev/null
+++ b/target/linux/layerscape/patches-5.4/302-dts-0053-sdk-arm64-dts-nxp-add-DPAA1-SDK-flavor-dts-files.patch
@@ -0,0 +1,187 @@
+From 13fdde4dfdccd567ae459db6e439a53496732748 Mon Sep 17 00:00:00 2001
+From: Pramod Kumar <pramod.kumar_1@nxp.com>
+Date: Wed, 8 May 2019 18:25:16 +0530
+Subject: [PATCH] sdk: arm64: dts: nxp: add DPAA1 SDK flavor dts files
+
+dts fsl-ls1046a-frwy-sdk.dts which enables sdk specific entries
+dts fsl-ls1046a-frwy-usdpaa.dts which enables dpdk
+
+Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
+Signed-off-by: Pramod Kumar <pramod.kumar_1@nxp.com>
+---
+ arch/arm64/boot/dts/freescale/Makefile | 2 +
+ .../boot/dts/freescale/fsl-ls1046a-frwy-sdk.dts | 53 ++++++++++++
+ .../boot/dts/freescale/fsl-ls1046a-frwy-usdpaa.dts | 99 ++++++++++++++++++++++
+ 3 files changed, 154 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-frwy-sdk.dts
+ create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-frwy-usdpaa.dts
+
+--- a/arch/arm64/boot/dts/freescale/Makefile
++++ b/arch/arm64/boot/dts/freescale/Makefile
+@@ -13,6 +13,8 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1
+ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb-sdk.dtb
+ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb-usdpaa.dtb
+ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-frwy.dtb
++dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-frwy-sdk.dtb
++dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-frwy-usdpaa.dtb
+ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-qds.dtb
+ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-qds-sdk.dtb
+ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb.dtb
+--- /dev/null
++++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-frwy-sdk.dts
+@@ -0,0 +1,53 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++/*
++ * Device Tree Include file for Freescale Layerscape-1046A family SoC.
++ *
++ * Copyright 2019 NXP.
++ *
++ */
++
++#include "fsl-ls1046a-frwy.dts"
++#include "qoriq-qman-portals-sdk.dtsi"
++#include "qoriq-bman-portals-sdk.dtsi"
++
++&bman_fbpr {
++ compatible = "fsl,bman-fbpr";
++ alloc-ranges = <0 0 0x10000 0>;
++};
++&qman_fqd {
++ compatible = "fsl,qman-fqd";
++ alloc-ranges = <0 0 0x10000 0>;
++};
++&qman_pfdr {
++ compatible = "fsl,qman-pfdr";
++ alloc-ranges = <0 0 0x10000 0>;
++};
++
++&soc {
++#include "qoriq-dpaa-eth.dtsi"
++#include "qoriq-fman3-0-6oh.dtsi"
++};
++
++&fsldpaa {
++ ethernet@1 {
++ status = "disabled";
++ };
++ ethernet@2 {
++ status = "disabled";
++ };
++ ethernet@3 {
++ status = "disabled";
++ };
++ ethernet@6 {
++ status = "disabled";
++ };
++ ethernet@9 {
++ compatible = "fsl,dpa-ethernet";
++ fsl,fman-mac = <&enet7>;
++ dma-coherent;
++ };
++};
++
++&fman0 {
++ compatible = "fsl,fman", "simple-bus";
++};
+--- /dev/null
++++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-frwy-usdpaa.dts
+@@ -0,0 +1,99 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++/*
++ * Device Tree Include file for Freescale Layerscape-1046A family SoC.
++ *
++ * Copyright 2019 NXP.
++ *
++ */
++
++#include "fsl-ls1046a-frwy-sdk.dts"
++
++&soc {
++ bp7: buffer-pool@7 {
++ compatible = "fsl,ls1046a-bpool", "fsl,bpool";
++ fsl,bpid = <7>;
++ fsl,bpool-ethernet-cfg = <0 0 0 192 0 0xdeadbeef>;
++ fsl,bpool-thresholds = <0x400 0xc00 0x0 0x0>;
++ };
++
++ bp8: buffer-pool@8 {
++ compatible = "fsl,ls1046a-bpool", "fsl,bpool";
++ fsl,bpid = <8>;
++ fsl,bpool-ethernet-cfg = <0 0 0 576 0 0xabbaf00d>;
++ fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
++ };
++
++ bp9: buffer-pool@9 {
++ compatible = "fsl,ls1046a-bpool", "fsl,bpool";
++ fsl,bpid = <9>;
++ fsl,bpool-ethernet-cfg = <0 0 0 2048 0 0xfeedabba>;
++ fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
++ };
++
++ fsl,dpaa {
++ compatible = "fsl,ls1046a", "fsl,dpaa", "simple-bus";
++
++ ethernet@0 {
++ compatible = "fsl,dpa-ethernet-init";
++ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
++ fsl,qman-frame-queues-rx = <0x50 1 0x51 1>;
++ fsl,qman-frame-queues-tx = <0x70 1 0x71 1>;
++ };
++
++ ethernet@4 {
++ compatible = "fsl,dpa-ethernet-init";
++ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
++ fsl,qman-frame-queues-rx = <0x52 1 0x53 1>;
++ fsl,qman-frame-queues-tx = <0x72 1 0x73 1>;
++ };
++
++ ethernet@5 {
++ compatible = "fsl,dpa-ethernet-init";
++ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
++ fsl,qman-frame-queues-rx = <0x54 1 0x55 1>;
++ fsl,qman-frame-queues-tx = <0x74 1 0x75 1>;
++ };
++
++ ethernet@9 {
++ compatible = "fsl,dpa-ethernet-init";
++ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
++ fsl,qman-frame-queues-rx = <0x56 1 0x57 1>;
++ fsl,qman-frame-queues-tx = <0x76 1 0x77 1>;
++ };
++
++ dpa-fman0-oh@2 {
++ compatible = "fsl,dpa-oh";
++ /* Define frame queues for the OH port*/
++ /* <OH Rx error, OH Rx default> */
++ fsl,qman-frame-queues-oh = <0x60 1 0x61 1>;
++ fsl,fman-oh-port = <&fman0_oh2>;
++ };
++ };
++};
++/ {
++ reserved-memory {
++ #address-cells = <2>;
++ #size-cells = <2>;
++ ranges;
++ /* For legacy usdpaa based use-cases, update the size and
++ alignment parameters. e.g. to allocate 256 MB memory:
++ size = <0 0x10000000>;
++ alignment = <0 0x10000000>;
++ */
++
++ usdpaa_mem: usdpaa_mem {
++ compatible = "fsl,usdpaa-mem";
++ alloc-ranges = <0 0 0x10000 0>;
++ size = <0 0x1000>;
++ alignment = <0 0x1000>;
++ };
++ };
++};
++
++&fman0 {
++ fman0_oh2: port@83000 {
++ cell-index = <1>;
++ compatible = "fsl,fman-port-oh";
++ reg = <0x83000 0x1000>;
++ };
++};