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author | Yangbo Lu <yangbo.lu@nxp.com> | 2020-04-10 10:47:05 +0800 |
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committer | Petr Štetiar <ynezz@true.cz> | 2020-05-07 12:53:06 +0200 |
commit | cddd4591404fb4c53dc0b3c0b15b942cdbed4356 (patch) | |
tree | 392c1179de46b0f804e3789edca19069b64e6b44 /target/linux/layerscape/patches-5.4/811-kvm-0001-arm64-KVM-support-flushing-device-memory.patch | |
parent | d1d2c0b5579ea4f69a42246c9318539d61ba1999 (diff) | |
download | upstream-cddd4591404fb4c53dc0b3c0b15b942cdbed4356.tar.gz upstream-cddd4591404fb4c53dc0b3c0b15b942cdbed4356.tar.bz2 upstream-cddd4591404fb4c53dc0b3c0b15b942cdbed4356.zip |
layerscape: add patches-5.4
Add patches for linux-5.4. The patches are from NXP LSDK-20.04 release
which was tagged LSDK-20.04-V5.4.
https://source.codeaurora.org/external/qoriq/qoriq-components/linux/
For boards LS1021A-IOT, and Traverse-LS1043 which are not involved in
LSDK, port the dts patches from 4.14.
The patches are sorted into the following categories:
301-arch-xxxx
302-dts-xxxx
303-core-xxxx
701-net-xxxx
801-audio-xxxx
802-can-xxxx
803-clock-xxxx
804-crypto-xxxx
805-display-xxxx
806-dma-xxxx
807-gpio-xxxx
808-i2c-xxxx
809-jailhouse-xxxx
810-keys-xxxx
811-kvm-xxxx
812-pcie-xxxx
813-pm-xxxx
814-qe-xxxx
815-sata-xxxx
816-sdhc-xxxx
817-spi-xxxx
818-thermal-xxxx
819-uart-xxxx
820-usb-xxxx
821-vfio-xxxx
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Diffstat (limited to 'target/linux/layerscape/patches-5.4/811-kvm-0001-arm64-KVM-support-flushing-device-memory.patch')
-rw-r--r-- | target/linux/layerscape/patches-5.4/811-kvm-0001-arm64-KVM-support-flushing-device-memory.patch | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/target/linux/layerscape/patches-5.4/811-kvm-0001-arm64-KVM-support-flushing-device-memory.patch b/target/linux/layerscape/patches-5.4/811-kvm-0001-arm64-KVM-support-flushing-device-memory.patch new file mode 100644 index 0000000000..7c9bc079fc --- /dev/null +++ b/target/linux/layerscape/patches-5.4/811-kvm-0001-arm64-KVM-support-flushing-device-memory.patch @@ -0,0 +1,42 @@ +From aa9e99f77f92814a0d83af8e6ed3148458d0f611 Mon Sep 17 00:00:00 2001 +From: Laurentiu Tudor <laurentiu.tudor@nxp.com> +Date: Tue, 26 Jul 2016 15:43:43 +0300 +Subject: [PATCH] arm64: KVM: support flushing device memory + +In the current implementation, trying to flush +memory not covered by the linear map (e.g. device +memory) causes a crash. Add support for flushing +"non-normal" memory by explicitly ioremap()-ing +it when such a case appears and do the cache flush +through this temporary mapping. +This allows dropping the special checks for qman +cacheable region when doing cache flushes. + +Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> +[fixed formatting issue] +Signed-off-by: Diana Craciun <diana.craciun@nxp.com> +--- + arch/arm64/include/asm/kvm_mmu.h | 12 ++++++++++-- + 1 file changed, 10 insertions(+), 2 deletions(-) + +--- a/arch/arm64/include/asm/kvm_mmu.h ++++ b/arch/arm64/include/asm/kvm_mmu.h +@@ -341,8 +341,16 @@ static inline void __invalidate_icache_g + static inline void __kvm_flush_dcache_pte(pte_t pte) + { + if (!cpus_have_const_cap(ARM64_HAS_STAGE2_FWB)) { +- struct page *page = pte_page(pte); +- kvm_flush_dcache_to_poc(page_address(page), PAGE_SIZE); ++ if (pfn_valid(pte_pfn(pte))) { ++ struct page *page = pte_page(pte); ++ ++ kvm_flush_dcache_to_poc(page_address(page), PAGE_SIZE); ++ } else { ++ void __iomem *va = ioremap_cache_ns(pte_pfn(pte) << PAGE_SHIFT, PAGE_SIZE); ++ ++ kvm_flush_dcache_to_poc(va, PAGE_SIZE); ++ iounmap(va); ++ } + } + } + |