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authorDaniel Golle <daniel@makrotopia.org>2022-03-21 01:16:48 +0000
committerPaul Spooren <mail@aparcar.org>2022-03-21 11:36:30 +0000
commit3a14580411adfb75f9a44eded9f41245b9e44606 (patch)
treec3002cc1a0948bfedc4475d7276da0b3ebd4775c /target/linux/layerscape/patches-5.4/812-pcie-0002-PCI-dwc-Use-interrupt-disabling-instead-of-masking.patch
parent9f9477b2751231d57cdd8c227149b88c93491d93 (diff)
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kernel: delete Linux 5.4 config and patches
As the upcoming release will be based on Linux 5.10 only, remove all kernel configuration as well as patches for Linux 5.4. There were no targets still actively using Linux 5.4. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Diffstat (limited to 'target/linux/layerscape/patches-5.4/812-pcie-0002-PCI-dwc-Use-interrupt-disabling-instead-of-masking.patch')
-rw-r--r--target/linux/layerscape/patches-5.4/812-pcie-0002-PCI-dwc-Use-interrupt-disabling-instead-of-masking.patch60
1 files changed, 0 insertions, 60 deletions
diff --git a/target/linux/layerscape/patches-5.4/812-pcie-0002-PCI-dwc-Use-interrupt-disabling-instead-of-masking.patch b/target/linux/layerscape/patches-5.4/812-pcie-0002-PCI-dwc-Use-interrupt-disabling-instead-of-masking.patch
deleted file mode 100644
index 3990c1597b..0000000000
--- a/target/linux/layerscape/patches-5.4/812-pcie-0002-PCI-dwc-Use-interrupt-disabling-instead-of-masking.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From c89d85a39df353290ea7af84a32d5ca692a3c27a Mon Sep 17 00:00:00 2001
-From: Fugang Duan <fugang.duan@nxp.com>
-Date: Sat, 2 Nov 2019 15:51:40 +0800
-Subject: [PATCH] PCI: dwc: Use interrupt disabling instead of masking
-
-commit 830920e065e9("PCI: dwc: Use interrupt masking instead
-of disabling") break i.MX platform PCIe suspend/resume when
-MSI enabled.
-
-Revert the commit to keep orinigal method that using interrupt
-disabling instead of masking.
-
-Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
----
- drivers/pci/controller/dwc/pcie-designware-host.c | 19 +++++++------------
- 1 file changed, 7 insertions(+), 12 deletions(-)
-
---- a/drivers/pci/controller/dwc/pcie-designware-host.c
-+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
-@@ -157,8 +157,8 @@ static void dw_pci_bottom_mask(struct ir
- bit = d->hwirq % MAX_MSI_IRQS_PER_CTRL;
-
- pp->irq_mask[ctrl] |= BIT(bit);
-- dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_MASK + res, 4,
-- pp->irq_mask[ctrl]);
-+ dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_ENABLE + res, 4,
-+ ~pp->irq_mask[ctrl]);
-
- raw_spin_unlock_irqrestore(&pp->lock, flags);
- }
-@@ -176,8 +176,8 @@ static void dw_pci_bottom_unmask(struct
- bit = d->hwirq % MAX_MSI_IRQS_PER_CTRL;
-
- pp->irq_mask[ctrl] &= ~BIT(bit);
-- dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_MASK + res, 4,
-- pp->irq_mask[ctrl]);
-+ dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_ENABLE + res, 4,
-+ ~pp->irq_mask[ctrl]);
-
- raw_spin_unlock_irqrestore(&pp->lock, flags);
- }
-@@ -659,15 +659,10 @@ void dw_pcie_setup_rc(struct pcie_port *
- num_ctrls = pp->num_vectors / MAX_MSI_IRQS_PER_CTRL;
-
- /* Initialize IRQ Status array */
-- for (ctrl = 0; ctrl < num_ctrls; ctrl++) {
-- pp->irq_mask[ctrl] = ~0;
-- dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_MASK +
-+ for (ctrl = 0; ctrl < num_ctrls; ctrl++)
-+ dw_pcie_rd_own_conf(pp, PCIE_MSI_INTR0_ENABLE +
- (ctrl * MSI_REG_CTRL_BLOCK_SIZE),
-- 4, pp->irq_mask[ctrl]);
-- dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_ENABLE +
-- (ctrl * MSI_REG_CTRL_BLOCK_SIZE),
-- 4, ~0);
-- }
-+ 4, &pp->irq_mask[ctrl]);
- }
-
- /* Setup RC BARs */