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authorJohn Crispin <john@phrozen.org>2018-05-07 12:07:32 +0200
committerJohn Crispin <john@phrozen.org>2018-05-24 22:11:55 +0200
commit050da2107a7eb2a571a8a3d0cee21cc6a44b72b8 (patch)
tree147c3b85ccae12e4b1659acd86ac93b13ecfa15d /target/linux/mediatek/patches-4.14/0217-arm64-dts-mt7622-add-flash-related-device-nodes.patch
parent4f67c1522d92bc4512c3ecf58c38ff9886530b48 (diff)
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mediatek: backport upstream mediatek patches
Signed-off-by: John Crispin <john@phrozen.org>
Diffstat (limited to 'target/linux/mediatek/patches-4.14/0217-arm64-dts-mt7622-add-flash-related-device-nodes.patch')
-rw-r--r--target/linux/mediatek/patches-4.14/0217-arm64-dts-mt7622-add-flash-related-device-nodes.patch103
1 files changed, 103 insertions, 0 deletions
diff --git a/target/linux/mediatek/patches-4.14/0217-arm64-dts-mt7622-add-flash-related-device-nodes.patch b/target/linux/mediatek/patches-4.14/0217-arm64-dts-mt7622-add-flash-related-device-nodes.patch
new file mode 100644
index 0000000000..fd11853c4a
--- /dev/null
+++ b/target/linux/mediatek/patches-4.14/0217-arm64-dts-mt7622-add-flash-related-device-nodes.patch
@@ -0,0 +1,103 @@
+From 0a84c72d1c606129b8af670cbcc73be4168ab753 Mon Sep 17 00:00:00 2001
+From: Sean Wang <sean.wang@mediatek.com>
+Date: Fri, 29 Dec 2017 10:36:37 +0800
+Subject: [PATCH 217/224] arm64: dts: mt7622: add flash related device nodes
+
+add nodes for NOR flash, parallel Nand flash with error correction code
+support.
+
+Signed-off-by: Sean Wang <sean.wang@mediatek.com>
+Cc: RogerCC Lin <rogercc.lin@mediatek.com>
+Cc: Guochun Mao <guochun.mao@mediatek.com>
+---
+ arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts | 21 +++++++++++++++++
+ arch/arm64/boot/dts/mediatek/mt7622.dtsi | 34 ++++++++++++++++++++++++++++
+ 2 files changed, 55 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
+index ba6a79caca21..48c5ba472721 100644
+--- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
++++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
+@@ -235,6 +235,10 @@
+ };
+ };
+
++&bch {
++ status = "disabled";
++};
++
+ &btif {
+ status = "okay";
+ };
+@@ -257,6 +261,23 @@
+ status = "okay";
+ };
+
++&nandc {
++ pinctrl-names = "default";
++ pinctrl-0 = <&parallel_nand_pins>;
++ status = "disabled";
++};
++
++&nor_flash {
++ pinctrl-names = "default";
++ pinctrl-0 = <&spi_nor_pins>;
++ status = "disabled";
++
++ flash@0 {
++ compatible = "jedec,spi-nor";
++ reg = <0>;
++ };
++};
++
+ &pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm7_pins>;
+diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+index 448cd366995b..d287d75e1a54 100644
+--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
++++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+@@ -468,6 +468,40 @@
+ status = "disabled";
+ };
+
++ nandc: nfi@1100d000 {
++ compatible = "mediatek,mt7622-nfc";
++ reg = <0 0x1100D000 0 0x1000>;
++ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
++ clocks = <&pericfg CLK_PERI_NFI_PD>,
++ <&pericfg CLK_PERI_SNFI_PD>;
++ clock-names = "nfi_clk", "pad_clk";
++ ecc-engine = <&bch>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "disabled";
++ };
++
++ bch: ecc@1100e000 {
++ compatible = "mediatek,mt7622-ecc";
++ reg = <0 0x1100e000 0 0x1000>;
++ interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_LOW>;
++ clocks = <&pericfg CLK_PERI_NFIECC_PD>;
++ clock-names = "nfiecc_clk";
++ status = "disabled";
++ };
++
++ nor_flash: spi@11014000 {
++ compatible = "mediatek,mt7622-nor",
++ "mediatek,mt8173-nor";
++ reg = <0 0x11014000 0 0xe0>;
++ clocks = <&pericfg CLK_PERI_FLASH_PD>,
++ <&topckgen CLK_TOP_FLASH_SEL>;
++ clock-names = "spi", "sf";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ status = "disabled";
++ };
++
+ spi1: spi@11016000 {
+ compatible = "mediatek,mt7622-spi";
+ reg = <0 0x11016000 0 0x100>;
+--
+2.11.0
+