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| author | John Crispin <john@phrozen.org> | 2017-08-18 18:11:52 +0200 |
|---|---|---|
| committer | John Crispin <john@phrozen.org> | 2017-08-18 18:41:41 +0200 |
| commit | 1f068588efddf0175e954ffc07ec8478bddd52c7 (patch) | |
| tree | 3e65bb1b6d076cac2597db4bcbf71a9fedee1099 /target/linux/mediatek/patches-4.9/0050-net-mediatek-add-trgmii-clock.patch | |
| parent | 364befeccf01c07049b492d90e98c2c13457c7c3 (diff) | |
| download | upstream-1f068588efddf0175e954ffc07ec8478bddd52c7.tar.gz upstream-1f068588efddf0175e954ffc07ec8478bddd52c7.tar.bz2 upstream-1f068588efddf0175e954ffc07ec8478bddd52c7.zip | |
mediatek: update to latest kernel patchset from v4.13-rc
Signed-off-by: Muciri Gatimu <muciri@openmesh.com>
Signed-off-by: Shashidhar Lakkavalli <shashidhar.lakkavalli@openmesh.com>
Signed-off-by: John Crispin <john@phrozen.org>
Diffstat (limited to 'target/linux/mediatek/patches-4.9/0050-net-mediatek-add-trgmii-clock.patch')
| -rw-r--r-- | target/linux/mediatek/patches-4.9/0050-net-mediatek-add-trgmii-clock.patch | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/target/linux/mediatek/patches-4.9/0050-net-mediatek-add-trgmii-clock.patch b/target/linux/mediatek/patches-4.9/0050-net-mediatek-add-trgmii-clock.patch new file mode 100644 index 0000000000..3d7df70bb3 --- /dev/null +++ b/target/linux/mediatek/patches-4.9/0050-net-mediatek-add-trgmii-clock.patch @@ -0,0 +1,21 @@ +From 67c4af99af02d86b627a8cde2e99cc4c9699d2ce Mon Sep 17 00:00:00 2001 +From: John Crispin <john@phrozen.org> +Date: Thu, 10 Aug 2017 15:59:08 +0200 +Subject: [PATCH 50/57] net: mediatek: add trgmii clock + +Signed-off-by: John Crispin <john@phrozen.org> +--- + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +@@ -1873,6 +1873,8 @@ static int mtk_hw_init(struct mtk_eth *e + pm_runtime_enable(eth->dev); + pm_runtime_get_sync(eth->dev); + ++ clk_set_rate(eth->clks[MTK_CLK_TRGPLL], 250000000); ++ + clk_prepare_enable(eth->clks[MTK_CLK_ETHIF]); + clk_prepare_enable(eth->clks[MTK_CLK_ESW]); + clk_prepare_enable(eth->clks[MTK_CLK_GP1]); |