diff options
| author | Felix Fietkau <nbd@nbd.name> | 2020-10-24 21:15:20 +0200 |
|---|---|---|
| committer | Daniel Golle <daniel@makrotopia.org> | 2021-02-28 00:45:56 +0000 |
| commit | c46ccb69d17e584479df849a107423175a143c83 (patch) | |
| tree | 10c0b329ba571cbdd366e48e61173a64e56c841d /target/linux/mediatek/patches-5.10/700-net-ethernet-mtk_eth_soc-add-support-for-coherent-DM.patch | |
| parent | 11425c9de29c8b9c5e4d7eec163a6afbb7fbdce2 (diff) | |
| download | upstream-c46ccb69d17e584479df849a107423175a143c83.tar.gz upstream-c46ccb69d17e584479df849a107423175a143c83.tar.bz2 upstream-c46ccb69d17e584479df849a107423175a143c83.zip | |
mediatek: mt7622: add Linux 5.10 support
Switch mt7622 subtarget to Linux 5.10, it has been tested by many of us
on several devices for a couple of weeks already.
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Diffstat (limited to 'target/linux/mediatek/patches-5.10/700-net-ethernet-mtk_eth_soc-add-support-for-coherent-DM.patch')
| -rw-r--r-- | target/linux/mediatek/patches-5.10/700-net-ethernet-mtk_eth_soc-add-support-for-coherent-DM.patch | 85 |
1 files changed, 85 insertions, 0 deletions
diff --git a/target/linux/mediatek/patches-5.10/700-net-ethernet-mtk_eth_soc-add-support-for-coherent-DM.patch b/target/linux/mediatek/patches-5.10/700-net-ethernet-mtk_eth_soc-add-support-for-coherent-DM.patch new file mode 100644 index 0000000000..8c9194e5f2 --- /dev/null +++ b/target/linux/mediatek/patches-5.10/700-net-ethernet-mtk_eth_soc-add-support-for-coherent-DM.patch @@ -0,0 +1,85 @@ +From: Felix Fietkau <nbd@nbd.name> +Date: Fri, 4 Sep 2020 18:36:06 +0200 +Subject: [PATCH] net: ethernet: mtk_eth_soc: add support for coherent DMA + +It improves performance by eliminating the need for a cache flush on rx and tx + +Signed-off-by: Felix Fietkau <nbd@nbd.name> +--- + +--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi ++++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi +@@ -357,7 +357,7 @@ + }; + + cci_control2: slave-if@5000 { +- compatible = "arm,cci-400-ctrl-if"; ++ compatible = "arm,cci-400-ctrl-if", "syscon"; + interface-type = "ace"; + reg = <0x5000 0x1000>; + }; +@@ -967,6 +967,8 @@ + power-domains = <&scpsys MT7622_POWER_DOMAIN_ETHSYS>; + mediatek,ethsys = <ðsys>; + mediatek,sgmiisys = <&sgmiisys>; ++ mediatek,cci-control = <&cci_control2>; ++ dma-coherent; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +@@ -9,6 +9,7 @@ + #include <linux/of_device.h> + #include <linux/of_mdio.h> + #include <linux/of_net.h> ++#include <linux/of_address.h> + #include <linux/mfd/syscon.h> + #include <linux/regmap.h> + #include <linux/clk.h> +@@ -2482,6 +2483,13 @@ static int mtk_hw_init(struct mtk_eth *e + if (ret) + goto err_disable_pm; + ++ if (of_dma_is_coherent(eth->dev->of_node)) { ++ u32 mask = ETHSYS_DMA_AG_MAP_PDMA | ETHSYS_DMA_AG_MAP_QDMA | ++ ETHSYS_DMA_AG_MAP_PPE; ++ ++ regmap_update_bits(eth->ethsys, ETHSYS_DMA_AG_MAP, mask, mask); ++ } ++ + if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) { + ret = device_reset(eth->dev); + if (ret) { +@@ -3061,6 +3069,16 @@ static int mtk_probe(struct platform_dev + } + } + ++ if (of_dma_is_coherent(pdev->dev.of_node)) { ++ struct regmap *cci; ++ ++ cci = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, ++ "mediatek,cci-control"); ++ /* enable CPU/bus coherency */ ++ if (!IS_ERR(cci)) ++ regmap_write(cci, 0, 3); ++ } ++ + if (MTK_HAS_CAPS(eth->soc->caps, MTK_SGMII)) { + eth->sgmii = devm_kzalloc(eth->dev, sizeof(*eth->sgmii), + GFP_KERNEL); +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h +@@ -437,6 +437,12 @@ + #define RSTCTRL_FE BIT(6) + #define RSTCTRL_PPE BIT(31) + ++/* ethernet dma channel agent map */ ++#define ETHSYS_DMA_AG_MAP 0x408 ++#define ETHSYS_DMA_AG_MAP_PDMA BIT(0) ++#define ETHSYS_DMA_AG_MAP_QDMA BIT(1) ++#define ETHSYS_DMA_AG_MAP_PPE BIT(2) ++ + /* SGMII subsystem config registers */ + /* Register to auto-negotiation restart */ + #define SGMSYS_PCS_CONTROL_1 0x0 |