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authorFelix Fietkau <nbd@openwrt.org>2015-01-18 20:16:44 +0000
committerFelix Fietkau <nbd@openwrt.org>2015-01-18 20:16:44 +0000
commit69ee1807edca271e31804efb033fee92c111b738 (patch)
treecb8e692777d6e817565cf1ccba6348d1d94063c2 /target/linux/ramips/dts/mt7628an.dtsi
parenta5b578c2d9a9c0384b395fc57ccd071e7cff2ede (diff)
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ralink: add ethernet fe and esw reset control bit
Signed-off-by: michael lee <igvtee@gmail.com> SVN-Revision: 44042
Diffstat (limited to 'target/linux/ramips/dts/mt7628an.dtsi')
-rw-r--r--target/linux/ramips/dts/mt7628an.dtsi6
1 files changed, 6 insertions, 0 deletions
diff --git a/target/linux/ramips/dts/mt7628an.dtsi b/target/linux/ramips/dts/mt7628an.dtsi
index bb52c6aabe..bf786c8f69 100644
--- a/target/linux/ramips/dts/mt7628an.dtsi
+++ b/target/linux/ramips/dts/mt7628an.dtsi
@@ -197,12 +197,18 @@
interrupt-parent = <&cpuintc>;
interrupts = <5>;
+
+ resets = <&rstctrl 21 &rstctrl 23>;
+ reset-names = "fe", "esw";
};
esw@10110000 {
compatible = "ralink,rt3050-esw";
reg = <0x10110000 8000>;
+ resets = <&rstctrl 23>;
+ reset-names = "esw";
+
interrupt-parent = <&intc>;
interrupts = <17>;
};