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author | Gabor Juhos <juhosg@openwrt.org> | 2011-03-27 19:19:59 +0000 |
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committer | Gabor Juhos <juhosg@openwrt.org> | 2011-03-27 19:19:59 +0000 |
commit | 9ef47853643cd78f497d58bb6b6f758d2008e081 (patch) | |
tree | f4c4ab453c35a6845b4158106bc4a67bf2658541 /target/linux/ramips/files/arch/mips/ralink/rt288x | |
parent | 37d6d88869c5df7d01ed0e960be1d8ef6cee6271 (diff) | |
download | upstream-9ef47853643cd78f497d58bb6b6f758d2008e081.tar.gz upstream-9ef47853643cd78f497d58bb6b6f758d2008e081.tar.bz2 upstream-9ef47853643cd78f497d58bb6b6f758d2008e081.zip |
ramips: define GPIO chips separately for each SoCs
SVN-Revision: 26326
Diffstat (limited to 'target/linux/ramips/files/arch/mips/ralink/rt288x')
-rw-r--r-- | target/linux/ramips/files/arch/mips/ralink/rt288x/rt288x.c | 73 |
1 files changed, 72 insertions, 1 deletions
diff --git a/target/linux/ramips/files/arch/mips/ralink/rt288x/rt288x.c b/target/linux/ramips/files/arch/mips/ralink/rt288x/rt288x.c index c87a360294..53b1a69114 100644 --- a/target/linux/ramips/files/arch/mips/ralink/rt288x/rt288x.c +++ b/target/linux/ramips/files/arch/mips/ralink/rt288x/rt288x.c @@ -43,6 +43,77 @@ void __init rt288x_detect_sys_type(void) (id & CHIP_ID_REV_MASK)); } +static struct ramips_gpio_chip rt288x_gpio_chips[] = { + { + .chip = { + .label = "RT288X-GPIO0", + .base = 0, + .ngpio = 24, + }, + .regs = { + [RAMIPS_GPIO_REG_INT] = 0x00, + [RAMIPS_GPIO_REG_EDGE] = 0x04, + [RAMIPS_GPIO_REG_RENA] = 0x08, + [RAMIPS_GPIO_REG_FENA] = 0x0c, + [RAMIPS_GPIO_REG_DATA] = 0x20, + [RAMIPS_GPIO_REG_DIR] = 0x24, + [RAMIPS_GPIO_REG_POL] = 0x28, + [RAMIPS_GPIO_REG_SET] = 0x2c, + [RAMIPS_GPIO_REG_RESET] = 0x30, + [RAMIPS_GPIO_REG_TOGGLE] = 0x34, + }, + .map_base = RT2880_PIO_BASE, + .map_size = RT2880_PIO_SIZE, + }, + { + .chip = { + .label = "RT288X-GPIO1", + .base = 24, + .ngpio = 16, + }, + .regs = { + [RAMIPS_GPIO_REG_INT] = 0x38, + [RAMIPS_GPIO_REG_EDGE] = 0x3c, + [RAMIPS_GPIO_REG_RENA] = 0x40, + [RAMIPS_GPIO_REG_FENA] = 0x44, + [RAMIPS_GPIO_REG_DATA] = 0x48, + [RAMIPS_GPIO_REG_DIR] = 0x4c, + [RAMIPS_GPIO_REG_POL] = 0x50, + [RAMIPS_GPIO_REG_SET] = 0x54, + [RAMIPS_GPIO_REG_RESET] = 0x58, + [RAMIPS_GPIO_REG_TOGGLE] = 0x5c, + }, + .map_base = RT2880_PIO_BASE, + .map_size = RT2880_PIO_SIZE, + }, + { + .chip = { + .label = "RT288X-GPIO2", + .base = 40, + .ngpio = 32, + }, + .regs = { + [RAMIPS_GPIO_REG_INT] = 0x60, + [RAMIPS_GPIO_REG_EDGE] = 0x64, + [RAMIPS_GPIO_REG_RENA] = 0x68, + [RAMIPS_GPIO_REG_FENA] = 0x6c, + [RAMIPS_GPIO_REG_DATA] = 0x70, + [RAMIPS_GPIO_REG_DIR] = 0x74, + [RAMIPS_GPIO_REG_POL] = 0x78, + [RAMIPS_GPIO_REG_SET] = 0x7c, + [RAMIPS_GPIO_REG_RESET] = 0x80, + [RAMIPS_GPIO_REG_TOGGLE] = 0x84, + }, + .map_base = RT2880_PIO_BASE, + .map_size = RT2880_PIO_SIZE, + }, +}; + +static struct ramips_gpio_data rt288x_gpio_data = { + .chips = rt288x_gpio_chips, + .num_chips = ARRAY_SIZE(rt288x_gpio_chips), +}; + static void rt288x_gpio_reserve(int first, int last) { for (; first <= last; first++) @@ -53,7 +124,7 @@ void __init rt288x_gpio_init(u32 mode) { rt288x_sysc_wr(mode, SYSC_REG_GPIO_MODE); - ramips_gpio_init(); + ramips_gpio_init(&rt288x_gpio_data); if ((mode & RT2880_GPIO_MODE_I2C) == 0) rt288x_gpio_reserve(1, 2); |