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authorRui Salvaterra <rsalvaterra@gmail.com>2021-03-30 23:59:49 +0100
committerDaniel Golle <daniel@makrotopia.org>2021-03-31 00:58:49 +0100
commit9c3b2d7ff755216a93d0ffa7d0375007cb7d3294 (patch)
treea46a3586a44b0508118a6d1b99a64b89afea3af4 /target/linux/ramips/patches-5.10/323-mt7621-memory-detect.patch
parent4b2e4518acaf1bed9c06fbd44a7f175e7fdb0a29 (diff)
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ramips/mt7621: drop the timer recalibration patch
We've been carrying this patch for many years [1], in order to fix a timer calibration issue on MT7621. Turns out, after retesting with a recent kernel (Linux 5.10), the system works perfectly fine without it (no rcu_sched stalls or inconsistent BogoMIPS values across CPUs). Manually refreshed: 322-mt7621-fix-cpu-clk-add-clkdev.patch 323-mt7621-memory-detect.patch [1] https://git.openwrt.org/?p=openwrt/openwrt.git;a=commitdiff;h=6f4a903533361a2906a4d94ac6f597cd9c6c47bc Suggested-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com> Tested-by: Donald Hoskins <grommish@gmail.com> Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
Diffstat (limited to 'target/linux/ramips/patches-5.10/323-mt7621-memory-detect.patch')
-rw-r--r--target/linux/ramips/patches-5.10/323-mt7621-memory-detect.patch10
1 files changed, 5 insertions, 5 deletions
diff --git a/target/linux/ramips/patches-5.10/323-mt7621-memory-detect.patch b/target/linux/ramips/patches-5.10/323-mt7621-memory-detect.patch
index 07c7588661..9f80d02638 100644
--- a/target/linux/ramips/patches-5.10/323-mt7621-memory-detect.patch
+++ b/target/linux/ramips/patches-5.10/323-mt7621-memory-detect.patch
@@ -44,10 +44,10 @@ Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
#define MT7621_CHIP_NAME1 0x20203132
--- a/arch/mips/ralink/mt7621.c
+++ b/arch/mips/ralink/mt7621.c
-@@ -10,11 +10,13 @@
+@@ -9,11 +9,13 @@
+ #include <linux/init.h>
#include <linux/slab.h>
#include <linux/sys_soc.h>
- #include <linux/jiffies.h>
+#include <linux/memblock.h>
#include <linux/clk.h>
#include <linux/clkdev.h>
@@ -58,7 +58,7 @@ Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
#include <asm/mipsregs.h>
#include <asm/smp-ops.h>
#include <asm/mips-cps.h>
-@@ -57,6 +59,8 @@
+@@ -55,6 +57,8 @@
#define MT7621_GPIO_MODE_SDHCI_SHIFT 18
#define MT7621_GPIO_MODE_SDHCI_GPIO 1
@@ -67,7 +67,7 @@ Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
static struct rt2880_pmx_func uart1_grp[] = { FUNC("uart1", 0, 1, 2) };
static struct rt2880_pmx_func i2c_grp[] = { FUNC("i2c", 0, 3, 2) };
static struct rt2880_pmx_func uart3_grp[] = {
-@@ -141,6 +145,26 @@ static struct clk *__init mt7621_add_sys
+@@ -139,6 +143,26 @@ static struct clk *__init mt7621_add_sys
return clk;
}
@@ -94,7 +94,7 @@ Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
void __init ralink_clk_init(void)
{
u32 syscfg, xtal_sel, clkcfg, clk_sel, curclk, ffiv, ffrac;
-@@ -346,10 +370,7 @@ void prom_soc_init(struct ralink_soc_inf
+@@ -292,10 +316,7 @@ void prom_soc_init(struct ralink_soc_inf
(rev >> CHIP_REV_VER_SHIFT) & CHIP_REV_VER_MASK,
(rev & CHIP_REV_ECO_MASK));