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authorJohn Crispin <john@openwrt.org>2014-04-12 21:22:00 +0000
committerJohn Crispin <john@openwrt.org>2014-04-12 21:22:00 +0000
commit3d6ba83fe4dd315531e47f53a58195b36ce96382 (patch)
treefbccd41342db51fda53fe4d7cc8f9d83b586428d /target/linux/ramips
parentfa86c3053867bd89479e31817df48208b4e98daa (diff)
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rt2880 DT fixes
* add pinctrl * fix ethernet port * make wifi available by default Signed-off-by: Roman Yeryomin <roman@advem.lv> SVN-Revision: 40493
Diffstat (limited to 'target/linux/ramips')
-rw-r--r--target/linux/ramips/dts/rt2880.dtsi38
1 files changed, 36 insertions, 2 deletions
diff --git a/target/linux/ramips/dts/rt2880.dtsi b/target/linux/ramips/dts/rt2880.dtsi
index b51314856d..646cb6a991 100644
--- a/target/linux/ramips/dts/rt2880.dtsi
+++ b/target/linux/ramips/dts/rt2880.dtsi
@@ -121,15 +121,51 @@
};
};
+ pinctrl {
+ compatible = "ralink,rt2880-pinmux";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&state_default>;
+
+ state_default: pinctrl0 {
+ sdram {
+ ralink,group = "sdram";
+ ralink,function = "sdram";
+ };
+ };
+
+ spi_pins: spi {
+ spi {
+ ralink,group = "spi";
+ ralink,function = "spi";
+ };
+ };
+
+ uartlite_pins: uartlite {
+ uart {
+ ralink,group = "uartlite";
+ ralink,function = "uartlite";
+ };
+ };
+ };
+
ethernet@400000 {
compatible = "ralink,rt2880-eth";
reg = <0x00400000 10000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
interrupt-parent = <&cpuintc>;
interrupts = <5>;
status = "disabled";
+ port@0 {
+ compatible = "ralink,rt2880-port", "ralink,eth-port";
+ reg = <0>;
+ };
+
mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
@@ -146,8 +182,6 @@
interrupts = <6>;
ralink,eeprom = "soc_wmac.eeprom";
-
- status = "disabled";
};
};