diff options
author | Lars-Peter Clausen <lars@metafoo.de> | 2013-07-22 18:41:23 +0000 |
---|---|---|
committer | Lars-Peter Clausen <lars@metafoo.de> | 2013-07-22 18:41:23 +0000 |
commit | 32a83db34718f3145068d8f0af010320430d68c0 (patch) | |
tree | 76a6524942af537b972ffe80ada771d85748fcd4 /target/linux/xburst/patches-3.10/012-MIPS-JZ4740-Correct-clock-gate-bit-for-DMA-controlle.patch | |
parent | e7d77883c7bd91a365ae0d9d4e9c8579b4799bba (diff) | |
download | upstream-32a83db34718f3145068d8f0af010320430d68c0.tar.gz upstream-32a83db34718f3145068d8f0af010320430d68c0.tar.bz2 upstream-32a83db34718f3145068d8f0af010320430d68c0.zip |
xburst: Add 3.10 support
Missing files from the previous commit.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
SVN-Revision: 37510
Diffstat (limited to 'target/linux/xburst/patches-3.10/012-MIPS-JZ4740-Correct-clock-gate-bit-for-DMA-controlle.patch')
-rw-r--r-- | target/linux/xburst/patches-3.10/012-MIPS-JZ4740-Correct-clock-gate-bit-for-DMA-controlle.patch | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/target/linux/xburst/patches-3.10/012-MIPS-JZ4740-Correct-clock-gate-bit-for-DMA-controlle.patch b/target/linux/xburst/patches-3.10/012-MIPS-JZ4740-Correct-clock-gate-bit-for-DMA-controlle.patch new file mode 100644 index 0000000000..06850ec0ba --- /dev/null +++ b/target/linux/xburst/patches-3.10/012-MIPS-JZ4740-Correct-clock-gate-bit-for-DMA-controlle.patch @@ -0,0 +1,27 @@ +From 1a0086ae912b81a1e6c7213e97059c50a7bfe636 Mon Sep 17 00:00:00 2001 +From: Maarten ter Huurne <maarten@treewalker.org> +Date: Sun, 6 May 2012 01:51:09 +0200 +Subject: [PATCH 12/16] MIPS: JZ4740: Correct clock gate bit for DMA + controller + +Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> +--- + arch/mips/jz4740/clock.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/mips/jz4740/clock.c b/arch/mips/jz4740/clock.c +index 484d38a..1b5f554 100644 +--- a/arch/mips/jz4740/clock.c ++++ b/arch/mips/jz4740/clock.c +@@ -687,7 +687,7 @@ static struct clk jz4740_clock_simple_clks[] = { + [3] = { + .name = "dma", + .parent = &jz_clk_high_speed_peripheral.clk, +- .gate_bit = JZ_CLOCK_GATE_UART0, ++ .gate_bit = JZ_CLOCK_GATE_DMAC, + .ops = &jz_clk_simple_ops, + }, + [4] = { +-- +1.7.10.4 + |