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authorRosen Penev <rosenp@gmail.com>2018-06-07 14:21:38 -0700
committerJohn Crispin <john@phrozen.org>2018-06-08 09:31:37 +0200
commit289b2f5e8541943c08bcd37d61093e2fd29bc80a (patch)
treeff61f1ebb4774887e76025a920afd9d2ad4bf045 /target
parent66cc6dd6c4b19a8ef9e5d2ebed3e10876c8aeaf0 (diff)
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ramips: mt7621: Fix some cosmetic DTC warnings
Node /cpus/cpu@0 has a unit name, but no reg property Node /cpus/cpu@1 has a unit name, but no reg property Node /cpuintc@0 has a unit name, but no reg property Node /cpuclock@0 has a unit name, but no reg property Node /sysclock@0 has a unit name, but no reg property Node /pcie@1e140000/pcie0 missing ranges for PCI bridge (or not a bridge) Node /pcie@1e140000/pcie0 missing bus-range for PCI bridge Node /pcie@1e140000/pcie1 missing ranges for PCI bridge (or not a bridge) Node /pcie@1e140000/pcie1 missing bus-range for PCI bridge Node /pcie@1e140000/pcie2 missing ranges for PCI bridge (or not a bridge) Node /pcie@1e140000/pcie2 missing bus-range for PCI bridge Signed-off-by: Rosen Penev <rosenp@gmail.com>
Diffstat (limited to 'target')
-rw-r--r--target/linux/ramips/dts/mt7621.dtsi19
1 files changed, 10 insertions, 9 deletions
diff --git a/target/linux/ramips/dts/mt7621.dtsi b/target/linux/ramips/dts/mt7621.dtsi
index daca857f60..0655e35301 100644
--- a/target/linux/ramips/dts/mt7621.dtsi
+++ b/target/linux/ramips/dts/mt7621.dtsi
@@ -6,16 +6,23 @@
compatible = "mediatek,mt7621-soc";
cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
cpu@0 {
+ device_type = "cpu";
compatible = "mips,mips1004Kc";
+ reg = <0x0>;
};
cpu@1 {
+ device_type = "cpu";
compatible = "mips,mips1004Kc";
+ reg = <0x1>;
};
};
- cpuintc: cpuintc@0 {
+ cpuintc: cpuintc {
#address-cells = <0>;
#interrupt-cells = <1>;
interrupt-controller;
@@ -26,7 +33,7 @@
serial0 = &uartlite;
};
- cpuclock: cpuclock@0 {
+ cpuclock: cpuclock {
#clock-cells = <0>;
compatible = "fixed-clock";
@@ -34,7 +41,7 @@
clock-frequency = <880000000>;
};
- sysclock: sysclock@0 {
+ sysclock: sysclock {
#clock-cells = <0>;
compatible = "fixed-clock";
@@ -457,8 +464,6 @@
#address-cells = <3>;
#size-cells = <2>;
-
- device_type = "pci";
};
pcie1 {
@@ -466,8 +471,6 @@
#address-cells = <3>;
#size-cells = <2>;
-
- device_type = "pci";
};
pcie2 {
@@ -475,8 +478,6 @@
#address-cells = <3>;
#size-cells = <2>;
-
- device_type = "pci";
};
};
};