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authorFlorian Fainelli <florian@openwrt.org>2013-01-17 22:29:22 +0000
committerFlorian Fainelli <florian@openwrt.org>2013-01-17 22:29:22 +0000
commit5e45a4344c5a42430c04c9b09f3379c1689148a2 (patch)
treeb7d41eb844f5398d018403cbe2fac33f68f9e6ee /target
parentcf9343ac86b6f731da3c99eb3205f6e44b231fff (diff)
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mvebu: enable PCIe on Marvell Armada 370 Reference Design
Signed-off-by: Florian Fainelli <florian@openwrt.org> SVN-Revision: 35213
Diffstat (limited to 'target')
-rw-r--r--target/linux/mvebu/patches-3.8/044-arm_mvebu_add_pcie_dt_a370_rd.patch23
1 files changed, 23 insertions, 0 deletions
diff --git a/target/linux/mvebu/patches-3.8/044-arm_mvebu_add_pcie_dt_a370_rd.patch b/target/linux/mvebu/patches-3.8/044-arm_mvebu_add_pcie_dt_a370_rd.patch
new file mode 100644
index 0000000000..f3a02d7874
--- /dev/null
+++ b/target/linux/mvebu/patches-3.8/044-arm_mvebu_add_pcie_dt_a370_rd.patch
@@ -0,0 +1,23 @@
+--- a/arch/arm/boot/dts/armada-370-rd.dts
++++ b/arch/arm/boot/dts/armada-370-rd.dts
+@@ -71,5 +71,20 @@
+ usb@d0051000 {
+ status = "okay";
+ };
++
++ pcie-controller {
++ status = "okay";
++ /*
++ * The two PCIe units are accessible through
++ * both standard PCIe slots and mini-PCIe
++ * slots on the board.
++ */
++ pcie0@0xd0040000 {
++ status = "okay";
++ };
++ pcie1@0xd0080000 {
++ status = "okay";
++ };
++ };
+ };
+ };