ar71xx: the lack of DQ* flash status checking for cfi cmdset 0002 does not only apply to erase commands, it also affects writes. extend the workaround to cover writes commands as well

SVN-Revision: 19175

2 files changed, 71 insertions, 20 deletions

diff --git a/target/linux/ar71xx/patches-2.6.30/108-mtd_fix_cfi_cmdset_0002_erase_status_check.patch b/target/linux/ar71xx/patches-2.6.30/108-mtd_fix_cfi_cmdset_0002_erase_status_check.patch
deleted file mode 100644
index 3f25b61dd9..0000000000
--- a/target/linux/ar71xx/patches-2.6.30/108-mtd_fix_cfi_cmdset_0002_erase_status_check.patch
+++ /dev/null
@@ -1,20 +0,0 @@
---- a/drivers/mtd/chips/cfi_cmdset_0002.c
-+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
-@@ -1579,7 +1579,7 @@ static int __xipram do_erase_chip(struct
- 			chip->erase_suspended = 0;
- 		}
- 
--		if (chip_ready(map, adr))
-+		if (chip_good(map, adr, map_word_ff(map)))
- 			break;
- 
- 		if (time_after(jiffies, timeo)) {
-@@ -1667,7 +1667,7 @@ static int __xipram do_erase_oneblock(st
- 			chip->erase_suspended = 0;
- 		}
- 
--		if (chip_ready(map, adr)) {
-+		if (chip_good(map, adr, map_word_ff(map))) {
- 			xip_enable(map, chip, adr);
- 			break;
- 		}
diff --git a/target/linux/ar71xx/patches-2.6.30/108-mtd_fix_cfi_cmdset_0002_status_check.patch b/target/linux/ar71xx/patches-2.6.30/108-mtd_fix_cfi_cmdset_0002_status_check.patch
new file mode 100644
index 0000000000..6c49fd4ea3
--- /dev/null
+++ b/target/linux/ar71xx/patches-2.6.30/108-mtd_fix_cfi_cmdset_0002_status_check.patch
@@ -0,0 +1,71 @@
+--- a/drivers/mtd/chips/cfi_cmdset_0002.c
++++ b/drivers/mtd/chips/cfi_cmdset_0002.c
+@@ -39,7 +39,7 @@
+ #include <linux/mtd/xip.h>
+ 
+ #define AMD_BOOTLOC_BUG
+-#define FORCE_WORD_WRITE 0
++#define FORCE_WORD_WRITE 1
+ 
+ #define MAX_WORD_RETRIES 3
+ 
+@@ -190,6 +190,7 @@ static void fixup_amd_bootblock(struct m
+ }
+ #endif
+ 
++#if !FORCE_WORD_WRITE
+ static void fixup_use_write_buffers(struct mtd_info *mtd, void *param)
+ {
+ 	struct map_info *map = mtd->priv;
+@@ -199,6 +200,7 @@ static void fixup_use_write_buffers(stru
+ 		mtd->write = cfi_amdstd_write_buffers;
+ 	}
+ }
++#endif
+ 
+ /* Atmel chips don't use the same PRI format as AMD chips */
+ static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param)
+@@ -1152,7 +1154,7 @@ static int __xipram do_write_oneword(str
+ 			break;
+ 		}
+ 
+-		if (chip_ready(map, adr))
++		if (chip_good(map, adr, datum))
+ 			break;
+ 
+ 		/* Latency issues. Drop the lock, wait a while and retry */
+@@ -1436,6 +1438,7 @@ static int __xipram do_write_buffer(stru
+ }
+ 
+ 
++#if !FORCE_WORD_WRITE
+ static int cfi_amdstd_write_buffers(struct mtd_info *mtd, loff_t to, size_t len,
+ 				    size_t *retlen, const u_char *buf)
+ {
+@@ -1514,7 +1517,7 @@ static int cfi_amdstd_write_buffers(stru
+ 
+ 	return 0;
+ }
+-
++#endif
+ 
+ /*
+  * Handle devices with one erase region, that only implement
+@@ -1579,7 +1582,7 @@ static int __xipram do_erase_chip(struct
+ 			chip->erase_suspended = 0;
+ 		}
+ 
+-		if (chip_ready(map, adr))
++		if (chip_good(map, adr, map_word_ff(map)))
+ 			break;
+ 
+ 		if (time_after(jiffies, timeo)) {
+@@ -1667,7 +1670,7 @@ static int __xipram do_erase_oneblock(st
+ 			chip->erase_suspended = 0;
+ 		}
+ 
+-		if (chip_ready(map, adr)) {
++		if (chip_good(map, adr, map_word_ff(map))) {
+ 			xip_enable(map, chip, adr);
+ 			break;
+ 		}