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author | Joseph Benden <joe@benden.us> | 2019-05-08 11:52:56 -0700 |
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committer | Hauke Mehrtens <hauke@hauke-m.de> | 2019-06-16 16:40:08 +0200 |
commit | 88c07c655262ea63c342e7c9df67cfe36fe3e5df (patch) | |
tree | 249f0c4db7f90c33210d986937d0828d5c183106 /toolchain/gcc/patches/9.1.0/110-Fix-MIPS-PR-84790.patch | |
parent | 9b53201d9c53cd7021455ac9748b3dba744b468b (diff) | |
download | upstream-88c07c655262ea63c342e7c9df67cfe36fe3e5df.tar.gz upstream-88c07c655262ea63c342e7c9df67cfe36fe3e5df.tar.bz2 upstream-88c07c655262ea63c342e7c9df67cfe36fe3e5df.zip |
toolchain: Add GCC 9.1.0 release
Most of the patches are copied over from GCC 8.3.
The following patches are backported from the GCC 9.X development branch:
toolchain/gcc/patches/9.1.0/970-recompute-dom-fast-queries-before-vn.patch
toolchain/gcc/patches/9.1.0/975-g++-ICE-with-generic-lambda.patch
The specs file changed with gcc 9, now it contains "%@{L*}" instead of
"%{L*}" in older GCC versions.
Signed-off-by: Joseph Benden <joe@benden.us>
Diffstat (limited to 'toolchain/gcc/patches/9.1.0/110-Fix-MIPS-PR-84790.patch')
-rw-r--r-- | toolchain/gcc/patches/9.1.0/110-Fix-MIPS-PR-84790.patch | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/toolchain/gcc/patches/9.1.0/110-Fix-MIPS-PR-84790.patch b/toolchain/gcc/patches/9.1.0/110-Fix-MIPS-PR-84790.patch new file mode 100644 index 0000000000..c7e60e3157 --- /dev/null +++ b/toolchain/gcc/patches/9.1.0/110-Fix-MIPS-PR-84790.patch @@ -0,0 +1,20 @@ +Fix https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84790. +MIPS16 functions have a static assembler prologue which clobbers +registers v0 and v1. Add these register clobbers to function call +instructions. + +--- a/gcc/config/mips/mips.c ++++ b/gcc/config/mips/mips.c +@@ -3131,6 +3131,12 @@ mips_emit_call_insn (rtx pattern, rtx or + emit_insn (gen_update_got_version ()); + } + ++ if (TARGET_MIPS16 && TARGET_USE_GOT) ++ { ++ clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn), MIPS16_PIC_TEMP); ++ clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn), MIPS_PROLOGUE_TEMP (word_mode)); ++ } ++ + if (TARGET_MIPS16 + && TARGET_EXPLICIT_RELOCS + && TARGET_CALL_CLOBBERED_GP) |