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-rw-r--r--package/kernel/mac80211/patches/ath/403-world_regd_fixup.patch34
1 files changed, 17 insertions, 17 deletions
diff --git a/package/kernel/mac80211/patches/ath/403-world_regd_fixup.patch b/package/kernel/mac80211/patches/ath/403-world_regd_fixup.patch
index 2043083158..ed616b7532 100644
--- a/package/kernel/mac80211/patches/ath/403-world_regd_fixup.patch
+++ b/package/kernel/mac80211/patches/ath/403-world_regd_fixup.patch
@@ -4,15 +4,15 @@
NL80211_RRF_NO_OFDM)
/* We allow IBSS on these on a case by case basis by regulatory domain */
--#define ATH9K_5GHZ_5150_5350 REG_RULE(5150-10, 5350+10, 80, 0, 30,\
-+#define ATH9K_5GHZ_5150_5350 REG_RULE(5150-10, 5240+10, 80, 0, 30, 0),\
+-#define ATH_5GHZ_5150_5350 REG_RULE(5150-10, 5350+10, 80, 0, 30,\
++#define ATH_5GHZ_5150_5350 REG_RULE(5150-10, 5240+10, 80, 0, 30, 0),\
+ REG_RULE(5260-10, 5350+10, 80, 0, 30,\
NL80211_RRF_NO_IR)
- #define ATH9K_5GHZ_5470_5850 REG_RULE(5470-10, 5850+10, 80, 0, 30,\
+ #define ATH_5GHZ_5470_5850 REG_RULE(5470-10, 5850+10, 80, 0, 30,\
NL80211_RRF_NO_IR)
@@ -62,57 +63,56 @@ static struct reg_dmn_pair_mapping *ath_
- #define ATH9K_5GHZ_NO_MIDBAND ATH9K_5GHZ_5150_5350, \
- ATH9K_5GHZ_5725_5850
+ #define ATH_5GHZ_NO_MIDBAND ATH_5GHZ_5150_5350, \
+ ATH_5GHZ_5725_5850
+#define REGD_RULES(...) \
+ .reg_rules = { __VA_ARGS__ }, \
@@ -25,8 +25,8 @@
.alpha2 = "99",
- .reg_rules = {
+ REGD_RULES(
- ATH9K_2GHZ_ALL,
- ATH9K_5GHZ_ALL,
+ ATH_2GHZ_ALL,
+ ATH_5GHZ_ALL,
- }
+ )
};
@@ -37,9 +37,9 @@
.alpha2 = "99",
- .reg_rules = {
+ REGD_RULES(
- ATH9K_2GHZ_CH01_11,
- ATH9K_2GHZ_CH12_13,
- ATH9K_5GHZ_NO_MIDBAND,
+ ATH_2GHZ_CH01_11,
+ ATH_2GHZ_CH12_13,
+ ATH_5GHZ_NO_MIDBAND,
- }
+ )
};
@@ -50,8 +50,8 @@
.alpha2 = "99",
- .reg_rules = {
+ REGD_RULES(
- ATH9K_2GHZ_CH01_11,
- ATH9K_5GHZ_NO_MIDBAND,
+ ATH_2GHZ_CH01_11,
+ ATH_5GHZ_NO_MIDBAND,
- }
+ )
};
@@ -62,8 +62,8 @@
.alpha2 = "99",
- .reg_rules = {
+ REGD_RULES(
- ATH9K_2GHZ_CH01_11,
- ATH9K_5GHZ_ALL,
+ ATH_2GHZ_CH01_11,
+ ATH_5GHZ_ALL,
- }
+ )
};
@@ -74,9 +74,9 @@
.alpha2 = "99",
- .reg_rules = {
+ REGD_RULES(
- ATH9K_2GHZ_CH01_11,
- ATH9K_2GHZ_CH12_13,
- ATH9K_5GHZ_ALL,
+ ATH_2GHZ_CH01_11,
+ ATH_2GHZ_CH12_13,
+ ATH_5GHZ_ALL,
- }
+ )
};