diff options
Diffstat (limited to 'target/linux/ar71xx/files/arch/mips/ar71xx/irq.c')
| -rw-r--r-- | target/linux/ar71xx/files/arch/mips/ar71xx/irq.c | 81 |
1 files changed, 80 insertions, 1 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/irq.c b/target/linux/ar71xx/files/arch/mips/ar71xx/irq.c index dbaad5cab8..8acc3344f6 100644 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/irq.c +++ b/target/linux/ar71xx/files/arch/mips/ar71xx/irq.c @@ -93,6 +93,81 @@ static void __init ar71xx_pci_irq_init(void) setup_irq(AR71XX_CPU_IRQ_PCI, &ar71xx_pci_irqaction); } + +static void ar724x_pci_irq_dispatch(void) +{ + u32 pending; + + pending = ar724x_pci_rr(AR724X_PCI_REG_INT_STATUS) & + ar724x_pci_rr(AR724X_PCI_REG_INT_MASK); + + if (pending & AR724X_PCI_INT_DEV0) + do_IRQ(AR71XX_PCI_IRQ_DEV0); + + else + spurious_interrupt(); +} + +static void ar724x_pci_irq_unmask(unsigned int irq) +{ + switch (irq) { + case AR71XX_PCI_IRQ_DEV0: + irq -= AR71XX_PCI_IRQ_BASE; + ar724x_pci_wr(AR724X_PCI_REG_INT_MASK, + ar724x_pci_rr(AR724X_PCI_REG_INT_MASK) | + AR724X_PCI_INT_DEV0); + /* flush write */ + ar724x_pci_rr(AR724X_PCI_REG_INT_MASK); + } +} + +static void ar724x_pci_irq_mask(unsigned int irq) +{ + switch (irq) { + case AR71XX_PCI_IRQ_DEV0: + irq -= AR71XX_PCI_IRQ_BASE; + ar724x_pci_wr(AR724X_PCI_REG_INT_MASK, + ar724x_pci_rr(AR724X_PCI_REG_INT_MASK) & + ~AR724X_PCI_INT_DEV0); + /* flush write */ + ar724x_pci_rr(AR724X_PCI_REG_INT_MASK); + + ar724x_pci_wr(AR724X_PCI_REG_INT_STATUS, + ar724x_pci_rr(AR724X_PCI_REG_INT_STATUS) | + AR724X_PCI_INT_DEV0); + /* flush write */ + ar724x_pci_rr(AR724X_PCI_REG_INT_STATUS); + } +} + +static struct irq_chip ar724x_pci_irq_chip = { + .name = "AR724X PCI ", + .mask = ar724x_pci_irq_mask, + .unmask = ar724x_pci_irq_unmask, + .mask_ack = ar724x_pci_irq_mask, +}; + +static struct irqaction ar724x_pci_irqaction = { + .handler = no_action, + .name = "cascade [AR724X PCI]", +}; + +static void __init ar724x_pci_irq_init(void) +{ + int i; + + ar724x_pci_wr(AR724X_PCI_REG_INT_MASK, 0); + ar724x_pci_wr(AR724X_PCI_REG_INT_STATUS, 0); + + for (i = AR71XX_PCI_IRQ_BASE; + i < AR71XX_PCI_IRQ_BASE + AR71XX_PCI_IRQ_COUNT; i++) { + irq_desc[i].status = IRQ_DISABLED; + set_irq_chip_and_handler(i, &ar724x_pci_irq_chip, + handle_level_irq); + } + + setup_irq(AR71XX_CPU_IRQ_PCI, &ar724x_pci_irqaction); +} #endif /* CONFIG_PCI */ static void ar71xx_gpio_irq_dispatch(void) @@ -306,11 +381,15 @@ void __init arch_init_irq(void) case AR71XX_SOC_AR7130: case AR71XX_SOC_AR7141: case AR71XX_SOC_AR7161: - case AR71XX_SOC_AR7240: #ifdef CONFIG_PCI ar71xx_pci_irq_init(); ar71xx_ip2_irq_handler = ar71xx_pci_irq_dispatch; #endif + case AR71XX_SOC_AR7240: +#ifdef CONFIG_PCI + ar724x_pci_irq_init(); + ar71xx_ip2_irq_handler = ar724x_pci_irq_dispatch; +#endif break; case AR71XX_SOC_AR9130: case AR71XX_SOC_AR9132: |