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-rw-r--r--target/linux/ath79/patches-4.14/0009-MIPS-ath79-add-lots-of-missing-registers.patch25
1 files changed, 15 insertions, 10 deletions
diff --git a/target/linux/ath79/patches-4.14/0009-MIPS-ath79-add-lots-of-missing-registers.patch b/target/linux/ath79/patches-4.14/0009-MIPS-ath79-add-lots-of-missing-registers.patch
index ce6124f6e7..a8092177b4 100644
--- a/target/linux/ath79/patches-4.14/0009-MIPS-ath79-add-lots-of-missing-registers.patch
+++ b/target/linux/ath79/patches-4.14/0009-MIPS-ath79-add-lots-of-missing-registers.patch
@@ -1,12 +1,21 @@
-From 3ea2bff4ed3ce74dc4303aa20f5e906e78352f6b Mon Sep 17 00:00:00 2001
-From: John Crispin <john@phrozen.org>
+From e93fe20529aeb8738b87533f66c46e2c21524530 Mon Sep 17 00:00:00 2001
+From: Gabor Juhos <juhosg@openwrt.org>
Date: Tue, 6 Mar 2018 10:06:10 +0100
-Subject: [PATCH 09/27] MIPS: ath79: add lots of missing registers
+Subject: [PATCH 09/33] MIPS: ath79: add lots of missing registers
+This patch adds many new registers for various QCA MIPS SoCs. The patch is
+an aggragate of many contributions made to OpenWrt.
+
+Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
+Signed-off-by: Henryk Heisig <hyniu@o2.pl>
+Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net>
+Signed-off-by: Weijie Gao <hackpascal@gmail.com>
+Signed-off-by: Felix Fietkau <nbd@nbd.name>
+Signed-off-by: Julien Dusser <julien.dusser@free.fr>
Signed-off-by: John Crispin <john@phrozen.org>
---
- arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 773 ++++++++++++++++++++++++-
- 1 file changed, 771 insertions(+), 2 deletions(-)
+ arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 771 ++++++++++++++++++++++++-
+ 1 file changed, 770 insertions(+), 1 deletion(-)
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -650,7 +659,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
/*
* SRIF block
-@@ -552,4 +1007,322 @@
+@@ -552,4 +1007,318 @@
#define AR934X_SRIF_DPLL2_OUTDIV_SHIFT 13
#define AR934X_SRIF_DPLL2_OUTDIV_MASK 0x7
@@ -876,10 +885,6 @@ Signed-off-by: John Crispin <john@phrozen.org>
+#define AR934X_ETH_CFG_RDV_DELAY BIT(16)
+#define AR934X_ETH_CFG_RDV_DELAY_MASK 0x3
+#define AR934X_ETH_CFG_RDV_DELAY_SHIFT 16
-+#define AR934X_ETH_CFG_TXD_DELAY_MASK 0x3
-+#define AR934X_ETH_CFG_TXD_DELAY_SHIFT 18
-+#define AR934X_ETH_CFG_TXE_DELAY_MASK 0x3
-+#define AR934X_ETH_CFG_TXE_DELAY_SHIFT 20
+
+/*
+ * QCA953X GMAC Interface