aboutsummaryrefslogtreecommitdiffstats
path: root/target/linux/bmips/patches-5.10/009-v5.11-mips-bmips-add-BCM6318-reset-controller-definitions.patch
diff options
context:
space:
mode:
Diffstat (limited to 'target/linux/bmips/patches-5.10/009-v5.11-mips-bmips-add-BCM6318-reset-controller-definitions.patch')
-rw-r--r--target/linux/bmips/patches-5.10/009-v5.11-mips-bmips-add-BCM6318-reset-controller-definitions.patch42
1 files changed, 42 insertions, 0 deletions
diff --git a/target/linux/bmips/patches-5.10/009-v5.11-mips-bmips-add-BCM6318-reset-controller-definitions.patch b/target/linux/bmips/patches-5.10/009-v5.11-mips-bmips-add-BCM6318-reset-controller-definitions.patch
new file mode 100644
index 0000000000..4cbaa569cd
--- /dev/null
+++ b/target/linux/bmips/patches-5.10/009-v5.11-mips-bmips-add-BCM6318-reset-controller-definitions.patch
@@ -0,0 +1,42 @@
+From 8c9e8b0a28225c46f2cca0a09a3a111bb043e874 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
+Date: Wed, 17 Jun 2020 12:50:41 +0200
+Subject: [PATCH 9/9] mips: bmips: add BCM6318 reset controller definitions
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+BCM6318 SoCs have a reset controller for certain components.
+
+Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
+Acked-by: Florian Fainelli <F.fainelli@gmail.com>
+Reviewed-by: Rob Herring <robh@kernel.org>
+Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
+---
+ include/dt-bindings/reset/bcm6318-reset.h | 20 ++++++++++++++++++++
+ 1 file changed, 20 insertions(+)
+ create mode 100644 include/dt-bindings/reset/bcm6318-reset.h
+
+--- /dev/null
++++ b/include/dt-bindings/reset/bcm6318-reset.h
+@@ -0,0 +1,20 @@
++/* SPDX-License-Identifier: GPL-2.0+ */
++
++#ifndef __DT_BINDINGS_RESET_BCM6318_H
++#define __DT_BINDINGS_RESET_BCM6318_H
++
++#define BCM6318_RST_SPI 0
++#define BCM6318_RST_EPHY 1
++#define BCM6318_RST_SAR 2
++#define BCM6318_RST_ENETSW 3
++#define BCM6318_RST_USBD 4
++#define BCM6318_RST_USBH 5
++#define BCM6318_RST_PCIE_CORE 6
++#define BCM6318_RST_PCIE 7
++#define BCM6318_RST_PCIE_EXT 8
++#define BCM6318_RST_PCIE_HARD 9
++#define BCM6318_RST_ADSL 10
++#define BCM6318_RST_PHYMIPS 11
++#define BCM6318_RST_HOSTMIPS 12
++
++#endif /* __DT_BINDINGS_RESET_BCM6318_H */