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-rw-r--r--target/linux/brcm2708/patches-4.14/950-0250-BCM270X_DT-Add-Pi-3-dts-files.patch274
1 files changed, 274 insertions, 0 deletions
diff --git a/target/linux/brcm2708/patches-4.14/950-0250-BCM270X_DT-Add-Pi-3-dts-files.patch b/target/linux/brcm2708/patches-4.14/950-0250-BCM270X_DT-Add-Pi-3-dts-files.patch
new file mode 100644
index 0000000000..55727d529b
--- /dev/null
+++ b/target/linux/brcm2708/patches-4.14/950-0250-BCM270X_DT-Add-Pi-3-dts-files.patch
@@ -0,0 +1,274 @@
+From 09bd29626a880f4bbcd4d3b3ebbdbaf170e0b27c Mon Sep 17 00:00:00 2001
+From: Phil Elwell <phil@raspberrypi.org>
+Date: Fri, 21 Jul 2017 11:33:25 +0100
+Subject: [PATCH 250/454] BCM270X_DT: Add Pi 3+ dts files
+
+Signed-off-by: Phil Elwell <phil@raspberrypi.org>
+---
+ arch/arm/boot/dts/Makefile | 1 +
+ arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts | 183 +++++++++++++++++++++
+ arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi | 36 ++++
+ arch/arm/boot/dts/overlays/README | 8 +
+ 4 files changed, 228 insertions(+)
+ create mode 100644 arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts
+ create mode 100644 arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi
+
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -8,6 +8,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += \
+ bcm2708-rpi-0-w.dtb \
+ bcm2709-rpi-2-b.dtb \
+ bcm2710-rpi-3-b.dtb \
++ bcm2710-rpi-3-b-plus.dtb \
+ bcm2710-rpi-cm3.dtb
+
+ dtb-$(CONFIG_ARCH_ALPINE) += \
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts
+@@ -0,0 +1,183 @@
++/dts-v1/;
++
++#include "bcm2710.dtsi"
++#include "bcm283x-rpi-lan7515.dtsi"
++
++/ {
++ compatible = "raspberrypi,3-model-b-plus", "brcm,bcm2837";
++ model = "Raspberry Pi 3 Model B+";
++
++ chosen {
++ bootargs = "8250.nr_uarts=1";
++ };
++
++ aliases {
++ serial0 = &uart1;
++ serial1 = &uart0;
++ };
++};
++
++&gpio {
++ spi0_pins: spi0_pins {
++ brcm,pins = <9 10 11>;
++ brcm,function = <4>; /* alt0 */
++ };
++
++ spi0_cs_pins: spi0_cs_pins {
++ brcm,pins = <8 7>;
++ brcm,function = <1>; /* output */
++ };
++
++ i2c0_pins: i2c0 {
++ brcm,pins = <0 1>;
++ brcm,function = <4>;
++ };
++
++ i2c1_pins: i2c1 {
++ brcm,pins = <2 3>;
++ brcm,function = <4>;
++ };
++
++ i2s_pins: i2s {
++ brcm,pins = <18 19 20 21>;
++ brcm,function = <4>; /* alt0 */
++ };
++
++ sdio_pins: sdio_pins {
++ brcm,pins = <34 35 36 37 38 39>;
++ brcm,function = <7>; // alt3 = SD1
++ brcm,pull = <0 2 2 2 2 2>;
++ };
++
++ bt_pins: bt_pins {
++ brcm,pins = <43>;
++ brcm,function = <4>; /* alt0:GPCLK2 */
++ brcm,pull = <0>;
++ };
++
++ uart0_pins: uart0_pins {
++ brcm,pins = <32 33>;
++ brcm,function = <7>; /* alt3=UART0 */
++ brcm,pull = <0 2>;
++ };
++
++ uart1_pins: uart1_pins {
++ brcm,pins;
++ brcm,function;
++ brcm,pull;
++ };
++
++ audio_pins: audio_pins {
++ brcm,pins = <40 41>;
++ brcm,function = <4>;
++ };
++};
++
++&mmc {
++ pinctrl-names = "default";
++ pinctrl-0 = <&sdio_pins>;
++ non-removable;
++ bus-width = <4>;
++ status = "okay";
++ brcm,overclock-50 = <0>;
++};
++
++&soc {
++ expgpio: expgpio {
++ compatible = "brcm,bcm2835-expgpio";
++ gpio-controller;
++ #gpio-cells = <2>;
++ firmware = <&firmware>;
++ status = "okay";
++ };
++};
++
++&uart0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart0_pins &bt_pins>;
++ status = "okay";
++};
++
++&uart1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&uart1_pins>;
++ status = "okay";
++};
++
++&spi0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
++ cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
++
++ spidev0: spidev@0{
++ compatible = "spidev";
++ reg = <0>; /* CE0 */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ spi-max-frequency = <125000000>;
++ };
++
++ spidev1: spidev@1{
++ compatible = "spidev";
++ reg = <1>; /* CE1 */
++ #address-cells = <1>;
++ #size-cells = <0>;
++ spi-max-frequency = <125000000>;
++ };
++};
++
++&i2c0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2c0_pins>;
++ clock-frequency = <100000>;
++};
++
++&i2c1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2c1_pins>;
++ clock-frequency = <100000>;
++};
++
++&i2c2 {
++ clock-frequency = <100000>;
++};
++
++&i2s {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2s_pins>;
++};
++
++&leds {
++ act_led: act {
++ label = "led0";
++ linux,default-trigger = "mmc0";
++ gpios = <&gpio 29 0>;
++ };
++
++ pwr_led: pwr {
++ label = "led1";
++ linux,default-trigger = "default-on";
++ gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
++ };
++};
++
++&hdmi {
++ hpd-gpios = <&expgpio 4 GPIO_ACTIVE_LOW>;
++};
++
++&audio {
++ pinctrl-names = "default";
++ pinctrl-0 = <&audio_pins>;
++};
++
++/ {
++ __overrides__ {
++ act_led_gpio = <&act_led>,"gpios:4";
++ act_led_activelow = <&act_led>,"gpios:8";
++ act_led_trigger = <&act_led>,"linux,default-trigger";
++
++ pwr_led_gpio = <&pwr_led>,"gpios:4";
++ pwr_led_activelow = <&pwr_led>,"gpios:8";
++ pwr_led_trigger = <&pwr_led>,"linux,default-trigger";
++ };
++};
+--- /dev/null
++++ b/arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi
+@@ -0,0 +1,36 @@
++/ {
++ aliases {
++ ethernet0 = &ethernet;
++ };
++};
++
++&usb {
++ usb1@1 {
++ compatible = "usb424,2514";
++ reg = <1>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ usb1_1@1 {
++ compatible = "usb424,2514";
++ reg = <1>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ ethernet: usbether@1 {
++ compatible = "usb424,7800";
++ reg = <1>;
++ microchip,eee-enabled;
++ microchip,tx-lpi-timer = <600>; /* non-aggressive*/
++ };
++ };
++ };
++};
++
++
++/ {
++ __overrides__ {
++ eee = <&ethernet>,"microchip,eee-enabled?";
++ tx_lpi_timer = <&ethernet>,"microchip,tx-lpi-timer:0";
++ };
++};
+--- a/arch/arm/boot/dts/overlays/README
++++ b/arch/arm/boot/dts/overlays/README
+@@ -89,6 +89,10 @@ Params:
+ audio Set to "on" to enable the onboard ALSA audio
+ interface (default "off")
+
++ eee Enable Energy Efficient Ethernet support for
++ compatible devices (default "on"). See also
++ "tx_lpi_timer".
++
+ i2c_arm Set to "on" to enable the ARM's i2c interface
+ (default "off")
+
+@@ -125,6 +129,10 @@ Params:
+
+ sd_debug Enable debug output from SD driver (default off)
+
++ tx_lpi_timer Set the delay in microseconds between going idle
++ and entering the low power state (default 600).
++ Requires EEE to be enabled - see "eee".
++
+ uart0 Set to "off" to disable uart0 (default "on")
+
+ uart1 Set to "on" or "off" to enable or disable uart1
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-15 10:49:38 +0000