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Diffstat (limited to 'target/linux/brcm63xx/patches-3.14/014-MIPS-BCM63XX-remove-RUNTIME_DETECT-from-spi-code.patch')
-rw-r--r--target/linux/brcm63xx/patches-3.14/014-MIPS-BCM63XX-remove-RUNTIME_DETECT-from-spi-code.patch80
1 files changed, 80 insertions, 0 deletions
diff --git a/target/linux/brcm63xx/patches-3.14/014-MIPS-BCM63XX-remove-RUNTIME_DETECT-from-spi-code.patch b/target/linux/brcm63xx/patches-3.14/014-MIPS-BCM63XX-remove-RUNTIME_DETECT-from-spi-code.patch
new file mode 100644
index 0000000000..afde39bbaa
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.14/014-MIPS-BCM63XX-remove-RUNTIME_DETECT-from-spi-code.patch
@@ -0,0 +1,80 @@
+From 94f819bc230bb61a9ff21da6c860a40ca68c2805 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Tue, 3 Dec 2013 13:43:35 +0100
+Subject: [PATCH 5/8] MIPS: BCM63XX: remove !RUNTIME_DETECT from spi code
+
+---
+ arch/mips/bcm63xx/dev-spi.c | 4 ---
+ .../include/asm/mach-bcm63xx/bcm63xx_dev_spi.h | 31 ----------------------
+ 2 files changed, 35 deletions(-)
+
+--- a/arch/mips/bcm63xx/dev-spi.c
++++ b/arch/mips/bcm63xx/dev-spi.c
+@@ -18,7 +18,6 @@
+ #include <bcm63xx_dev_spi.h>
+ #include <bcm63xx_regs.h>
+
+-#ifdef BCMCPU_RUNTIME_DETECT
+ /*
+ * register offsets
+ */
+@@ -41,9 +40,6 @@ static __init void bcm63xx_spi_regs_init
+ BCMCPU_IS_6362() || BCMCPU_IS_6368())
+ bcm63xx_regs_spi = bcm6358_regs_spi;
+ }
+-#else
+-static __init void bcm63xx_spi_regs_init(void) { }
+-#endif
+
+ static struct resource spi_resources[] = {
+ {
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_spi.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_spi.h
+@@ -30,26 +30,6 @@ enum bcm63xx_regs_spi {
+ SPI_RX_DATA,
+ };
+
+-#define __GEN_SPI_RSET_BASE(__cpu, __rset) \
+- case SPI_## __rset: \
+- return SPI_## __cpu ##_## __rset;
+-
+-#define __GEN_SPI_RSET(__cpu) \
+- switch (reg) { \
+- __GEN_SPI_RSET_BASE(__cpu, CMD) \
+- __GEN_SPI_RSET_BASE(__cpu, INT_STATUS) \
+- __GEN_SPI_RSET_BASE(__cpu, INT_MASK_ST) \
+- __GEN_SPI_RSET_BASE(__cpu, INT_MASK) \
+- __GEN_SPI_RSET_BASE(__cpu, ST) \
+- __GEN_SPI_RSET_BASE(__cpu, CLK_CFG) \
+- __GEN_SPI_RSET_BASE(__cpu, FILL_BYTE) \
+- __GEN_SPI_RSET_BASE(__cpu, MSG_TAIL) \
+- __GEN_SPI_RSET_BASE(__cpu, RX_TAIL) \
+- __GEN_SPI_RSET_BASE(__cpu, MSG_CTL) \
+- __GEN_SPI_RSET_BASE(__cpu, MSG_DATA) \
+- __GEN_SPI_RSET_BASE(__cpu, RX_DATA) \
+- }
+-
+ #define __GEN_SPI_REGS_TABLE(__cpu) \
+ [SPI_CMD] = SPI_## __cpu ##_CMD, \
+ [SPI_INT_STATUS] = SPI_## __cpu ##_INT_STATUS, \
+@@ -66,20 +46,9 @@ enum bcm63xx_regs_spi {
+
+ static inline unsigned long bcm63xx_spireg(enum bcm63xx_regs_spi reg)
+ {
+-#ifdef BCMCPU_RUNTIME_DETECT
+ extern const unsigned long *bcm63xx_regs_spi;
+
+ return bcm63xx_regs_spi[reg];
+-#else
+-#if defined(CONFIG_BCM63XX_CPU_6338) || defined(CONFIG_BCM63XX_CPU_6348)
+- __GEN_SPI_RSET(6348)
+-#endif
+-#if defined(CONFIG_BCM63XX_CPU_6358) || defined(CONFIG_BCM63XX_CPU_6362) || \
+- defined(CONFIG_BCM63XX_CPU_6368)
+- __GEN_SPI_RSET(6358)
+-#endif
+-#endif
+- return 0;
+ }
+
+ #endif /* BCM63XX_DEV_SPI_H */