1 files changed, 180 insertions, 0 deletions
diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ap-303.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ap-303.dts
new file mode 100644
index 0000000000..126d944ebb
--- /dev/null
+++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ap-303.dts
@@ -0,0 +1,180 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+
+#include "qcom-ipq4029-aruba-glenmorangie.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+	model = "Aruba AP-303";
+	compatible = "aruba,ap-303";
+
+	aliases {
+		led-boot = &led_system_green;
+		led-failsafe = &led_system_red;
+		led-running = &led_system_green;
+		led-upgrade = &led_system_red;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		wifi_green {
+			label = "ap-303:green:wifi";
+			gpios = <&tlmm 39 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "phy0tpt";
+		};
+
+		wifi_amber {
+			label = "ap-303:amber:wifi";
+			gpios = <&tlmm 40 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "phy1tpt";
+		};
+
+		led_system_red: system_red {
+			label = "ap-303:red:system";
+			gpios = <&tlmm 46 GPIO_ACTIVE_HIGH>;
+		};
+
+		led_system_green: system_green {
+			label = "ap-303:green:system";
+			gpios = <&tlmm 47 GPIO_ACTIVE_HIGH>;
+		};
+	};
+};
+
+&tlmm {
+	/*
+	 * In addition to the Pins listed below,
+	 * the following GPIOs have "features":
+	 * 54 - out - active low to force HW reset
+	 * 41 - out - active low to reset TPM
+	 * 43 - out - active low to reset BLE radio
+	 * 19 - in  - active high when DC powered
+	 */
+
+	phy-reset {
+		line-name = "PHY-reset";
+		gpios = <42 GPIO_ACTIVE_HIGH>;
+		gpio-hog;
+		output-high;
+	};
+};
+
+&blsp1_spi1 {
+	pinctrl-0 = <&spi_0_pins>;
+	pinctrl-names = "default";
+	status = "okay";
+	cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <24000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			/*
+			 * There is no partition map for the NOR flash
+			 * in the stock firmware.
+			 *
+			 * All partitions here are based on offsets
+			 * found in the U-Boot GPL code and information
+			 * from smem.
+			 */
+
+			partition@0 {
+				label = "sbl1";
+				reg = <0x0 0x40000>;
+				read-only;
+			};
+
+			partition@40000 {
+				label = "mibib";
+				reg = <0x40000 0x20000>;
+				read-only;
+			};
+
+			partition@60000 {
+				label = "qsee";
+				reg = <0x60000 0x60000>;
+				read-only;
+			};
+
+			partition@c0000 {
+				label = "cdt";
+				reg = <0xc0000 0x10000>;
+				read-only;
+			};
+
+			partition@d0000 {
+				label = "ddrparams";
+				reg = <0xd0000 0x10000>;
+				read-only;
+			};
+
+			partition@e0000 {
+				label = "ART";
+				reg = <0xe0000 0x10000>;
+				read-only;
+			};
+
+			partition@f0000 {
+				label = "appsbl";
+				reg = <0xf0000 0xf0000>;
+				read-only;
+			};
+
+			partition@1e0000 {
+				label = "mfginfo";
+				reg = <0x1e0000 0x10000>;
+				read-only;
+			};
+
+			partition@1f0000 {
+				label = "apcd";
+				reg = <0x1f0000 0x10000>;
+				read-only;
+			};
+
+			partition@200000 {
+				label = "osss";
+				reg = <0x200000 0x180000>;
+				read-only;
+			};
+
+			partition@380000 {
+				/* This is empty */
+				label = "appsblenv";
+				reg = <0x380000 0x10000>;
+				read-only;
+			};
+
+			partition@390000 {
+				label = "pds";
+				reg = <0x390000 0x10000>;
+				read-only;
+			};
+
+			partition@3a0000 {
+				label = "fcache";
+				reg = <0x3a0000 0x10000>;
+				read-only;
+			};
+
+			partition@3b0000 {
+				/* Called osss1 in smem */
+				label = "u-boot-env-bak";
+				reg = <0x3b0000 0x10000>;
+				read-only;
+			};
+
+			partition@3f0000 {
+				label = "u-boot-env";
+				reg = <0x3f0000 0x10000>;
+				read-only;
+			};
+		};
+	};
+};