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-rw-r--r--target/linux/layerscape/patches-4.14/805-qe-support-layerscape.patch36
1 files changed, 23 insertions, 13 deletions
diff --git a/target/linux/layerscape/patches-4.14/805-qe-support-layerscape.patch b/target/linux/layerscape/patches-4.14/805-qe-support-layerscape.patch
index 141677c08d..0a6ad579ff 100644
--- a/target/linux/layerscape/patches-4.14/805-qe-support-layerscape.patch
+++ b/target/linux/layerscape/patches-4.14/805-qe-support-layerscape.patch
@@ -1,16 +1,17 @@
-From cfa7e6ed5a6ba529097ae8a50ed2c8fa12b4cad0 Mon Sep 17 00:00:00 2001
+From f4e3e2cf6484056225385d717da4e9c4f8613935 Mon Sep 17 00:00:00 2001
From: Biwen Li <biwen.li@nxp.com>
-Date: Tue, 30 Oct 2018 18:27:13 +0800
-Subject: [PATCH 22/40] qe: support layerscape
+Date: Wed, 17 Apr 2019 18:58:58 +0800
+Subject: [PATCH] qe: support layerscape
+
This is an integrated patch of qe for layerscape
-Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com
Signed-off-by: Biwen Li <biwen.li@nxp.com>
+Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
---
.../fsl/qe/qe_ic.c => irqchip/irq-qeic.c} | 389 +++++++++++-------
drivers/soc/fsl/qe/Kconfig | 2 +-
drivers/soc/fsl/qe/Makefile | 2 +-
- drivers/soc/fsl/qe/qe.c | 78 ++--
+ drivers/soc/fsl/qe/qe.c | 80 ++--
drivers/soc/fsl/qe/qe_ic.h | 103 -----
drivers/soc/fsl/qe/qe_io.c | 42 +-
drivers/soc/fsl/qe/qe_tdm.c | 8 +-
@@ -19,7 +20,7 @@ Signed-off-by: Biwen Li <biwen.li@nxp.com>
drivers/tty/serial/ucc_uart.c | 1 +
include/soc/fsl/qe/qe.h | 1 -
include/soc/fsl/qe/qe_ic.h | 139 -------
- 12 files changed, 357 insertions(+), 492 deletions(-)
+ 12 files changed, 359 insertions(+), 492 deletions(-)
rename drivers/{soc/fsl/qe/qe_ic.c => irqchip/irq-qeic.c} (54%)
delete mode 100644 drivers/soc/fsl/qe/qe_ic.h
delete mode 100644 include/soc/fsl/qe/qe_ic.h
@@ -1266,7 +1267,16 @@ Signed-off-by: Biwen Li <biwen.li@nxp.com>
of_node_put(qe);
-@@ -236,7 +254,7 @@ int qe_setbrg(enum qe_clock brg, unsigne
+@@ -229,14 +247,16 @@ int qe_setbrg(enum qe_clock brg, unsigne
+ /* Errata QE_General4, which affects some MPC832x and MPC836x SOCs, says
+ that the BRG divisor must be even if you're not using divide-by-16
+ mode. */
++#ifdef CONFIG_PPC
+ if (pvr_version_is(PVR_VER_836x) || pvr_version_is(PVR_VER_832x))
+ if (!div16 && (divisor & 1) && (divisor > 3))
+ divisor++;
++#endif
+
tempval = ((divisor - 1) << QE_BRGC_DIVISOR_SHIFT) |
QE_BRGC_ENABLE | div16;
@@ -1275,7 +1285,7 @@ Signed-off-by: Biwen Li <biwen.li@nxp.com>
return 0;
}
-@@ -370,9 +388,9 @@ static int qe_sdma_init(void)
+@@ -370,9 +390,9 @@ static int qe_sdma_init(void)
return -ENOMEM;
}
@@ -1288,7 +1298,7 @@ Signed-off-by: Biwen Li <biwen.li@nxp.com>
return 0;
}
-@@ -410,14 +428,14 @@ static void qe_upload_microcode(const vo
+@@ -410,14 +430,14 @@ static void qe_upload_microcode(const vo
"uploading microcode '%s'\n", ucode->id);
/* Use auto-increment */
@@ -1307,7 +1317,7 @@ Signed-off-by: Biwen Li <biwen.li@nxp.com>
}
/*
-@@ -502,7 +520,7 @@ int qe_upload_firmware(const struct qe_f
+@@ -502,7 +522,7 @@ int qe_upload_firmware(const struct qe_f
* If the microcode calls for it, split the I-RAM.
*/
if (!firmware->split)
@@ -1316,7 +1326,7 @@ Signed-off-by: Biwen Li <biwen.li@nxp.com>
if (firmware->soc.model)
printk(KERN_INFO
-@@ -536,11 +554,11 @@ int qe_upload_firmware(const struct qe_f
+@@ -536,11 +556,11 @@ int qe_upload_firmware(const struct qe_f
u32 trap = be32_to_cpu(ucode->traps[j]);
if (trap)
@@ -1330,7 +1340,7 @@ Signed-off-by: Biwen Li <biwen.li@nxp.com>
}
qe_firmware_uploaded = 1;
-@@ -659,9 +677,9 @@ EXPORT_SYMBOL(qe_get_num_of_risc);
+@@ -659,9 +679,9 @@ EXPORT_SYMBOL(qe_get_num_of_risc);
unsigned int qe_get_num_of_snums(void)
{
struct device_node *qe;
@@ -1342,7 +1352,7 @@ Signed-off-by: Biwen Li <biwen.li@nxp.com>
num_of_snums = 28; /* The default number of snum for threads is 28 */
qe = of_find_compatible_node(NULL, NULL, "fsl,qe");
-@@ -675,9 +693,9 @@ unsigned int qe_get_num_of_snums(void)
+@@ -675,9 +695,9 @@ unsigned int qe_get_num_of_snums(void)
return num_of_snums;
}