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Diffstat (limited to 'target/linux/layerscape/patches-4.4/3132-dts-ls1046a-add-LS1046ARDB-board-support.patch')
-rw-r--r--target/linux/layerscape/patches-4.4/3132-dts-ls1046a-add-LS1046ARDB-board-support.patch557
1 files changed, 0 insertions, 557 deletions
diff --git a/target/linux/layerscape/patches-4.4/3132-dts-ls1046a-add-LS1046ARDB-board-support.patch b/target/linux/layerscape/patches-4.4/3132-dts-ls1046a-add-LS1046ARDB-board-support.patch
deleted file mode 100644
index 77b53d76b3..0000000000
--- a/target/linux/layerscape/patches-4.4/3132-dts-ls1046a-add-LS1046ARDB-board-support.patch
+++ /dev/null
@@ -1,557 +0,0 @@
-From feb12cb699adbac2d4619401c7ff4fcc2fc97b6c Mon Sep 17 00:00:00 2001
-From: Mingkai Hu <mingkai.hu@nxp.com>
-Date: Mon, 26 Sep 2016 12:33:42 +0800
-Subject: [PATCH 132/141] dts/ls1046a: add LS1046ARDB board support
-
-commit e95a28cfd9a392fe5dc189a9ae097bbaaccd1228
-[context adjustment]
-
-Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
-Integrated-by: Zhao Qiang <qiang.zhao@nxp.com>
----
- arch/arm64/boot/dts/freescale/Makefile | 1 +
- arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts | 198 +++++++++++++++++++++
- arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 178 +++++++++++++-----
- 3 files changed, 328 insertions(+), 49 deletions(-)
- create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
-
---- a/arch/arm64/boot/dts/freescale/Makefile
-+++ b/arch/arm64/boot/dts/freescale/Makefile
-@@ -4,6 +4,7 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2
- dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb.dtb
- dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-rdb.dtb
- dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-frdm.dtb
-+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb.dtb
-
- always := $(dtb-y)
- subdir-y := $(dts-dirs)
---- /dev/null
-+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
-@@ -0,0 +1,198 @@
-+/*
-+ * Device Tree Include file for Freescale Layerscape-1046A family SoC.
-+ *
-+ * Copyright 2016, Freescale Semiconductor
-+ *
-+ * Mingkai Hu <mingkai.hu@nxp.com>
-+ *
-+ * This file is dual-licensed: you can use it either under the terms
-+ * of the GPLv2 or the X11 license, at your option. Note that this dual
-+ * licensing only applies to this file, and not this project as a
-+ * whole.
-+ *
-+ * a) This library is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of the
-+ * License, or (at your option) any later version.
-+ *
-+ * This library is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * Or, alternatively,
-+ *
-+ * b) Permission is hereby granted, free of charge, to any person
-+ * obtaining a copy of this software and associated documentation
-+ * files (the "Software"), to deal in the Software without
-+ * restriction, including without limitation the rights to use,
-+ * copy, modify, merge, publish, distribute, sublicense, and/or
-+ * sell copies of the Software, and to permit persons to whom the
-+ * Software is furnished to do so, subject to the following
-+ * conditions:
-+ *
-+ * The above copyright notice and this permission notice shall be
-+ * included in all copies or substantial portions of the Software.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
-+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
-+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
-+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
-+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
-+ * OTHER DEALINGS IN THE SOFTWARE.
-+ */
-+
-+/dts-v1/;
-+#include "fsl-ls1046a.dtsi"
-+
-+/ {
-+ model = "LS1046A RDB Board";
-+ compatible = "fsl,ls1046a-rdb", "fsl,ls1046a";
-+
-+ aliases {
-+ ethernet0 = &fm1mac3;
-+ ethernet1 = &fm1mac4;
-+ ethernet2 = &fm1mac5;
-+ ethernet3 = &fm1mac6;
-+ ethernet4 = &fm1mac9;
-+ ethernet5 = &fm1mac10;
-+ };
-+};
-+
-+&i2c0 {
-+ status = "okay";
-+ ina220@40 {
-+ compatible = "ti,ina220";
-+ reg = <0x40>;
-+ shunt-resistor = <1000>;
-+ };
-+ adt7461a@4c {
-+ compatible = "adi,adt7461";
-+ reg = <0x4c>;
-+ };
-+ eeprom@56 {
-+ compatible = "at24,24c512";
-+ reg = <0x52>;
-+ };
-+ eeprom@57 {
-+ compatible = "at24,24c512";
-+ reg = <0x53>;
-+ };
-+};
-+
-+&i2c3 {
-+ status = "okay";
-+ rtc@51 {
-+ compatible = "nxp,pcf2129";
-+ reg = <0x51>;
-+ };
-+};
-+
-+&ifc {
-+ status = "okay";
-+ #address-cells = <2>;
-+ #size-cells = <1>;
-+ /* NAND Flashe and CPLD on board */
-+ ranges = <0x0 0x0 0x0 0x7e800000 0x00010000
-+ 0x2 0x0 0x0 0x7fb00000 0x00000100>;
-+
-+ nand@0,0 {
-+ compatible = "fsl,ifc-nand";
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ reg = <0x0 0x0 0x10000>;
-+ };
-+
-+ cpld: board-control@2,0 {
-+ compatible = "fsl,ls1046ardb-cpld";
-+ reg = <0x2 0x0 0x0000100>;
-+ };
-+};
-+
-+&qspi {
-+ num-cs = <2>;
-+ bus-num = <0>;
-+ status = "okay";
-+
-+ qflash0: s25fs128s@0 {
-+ compatible = "spansion,m25p80";
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ spi-max-frequency = <20000000>;
-+ reg = <0>;
-+ };
-+
-+ qflash1: s25fs128s@1 {
-+ compatible = "spansion,m25p80";
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ spi-max-frequency = <20000000>;
-+ reg = <1>;
-+ };
-+
-+};
-+
-+&duart0 {
-+ status = "okay";
-+};
-+
-+&duart1 {
-+ status = "okay";
-+};
-+
-+&fman0 {
-+ ethernet@e4000 {
-+ phy-handle = <&rgmii_phy1>;
-+ phy-connection-type = "rgmii";
-+ };
-+
-+ ethernet@e6000 {
-+ phy-handle = <&rgmii_phy2>;
-+ phy-connection-type = "rgmii";
-+ };
-+
-+ ethernet@e8000 {
-+ phy-handle = <&sgmii_phy1>;
-+ phy-connection-type = "sgmii";
-+ };
-+
-+ ethernet@ea000 {
-+ phy-handle = <&sgmii_phy2>;
-+ phy-connection-type = "sgmii";
-+ };
-+
-+ ethernet@f0000 { /* 10GEC1 */
-+ phy-handle = <&aqr106_phy>;
-+ phy-connection-type = "xgmii";
-+ };
-+
-+ ethernet@f2000 { /* 10GEC2 */
-+ fixed-link = <0 1 10000 0 0>;
-+ phy-connection-type = "xgmii";
-+ };
-+
-+ mdio@fc000 {
-+ rgmii_phy1: ethernet-phy@1 {
-+ reg = <0x1>;
-+ };
-+ rgmii_phy2: ethernet-phy@2 {
-+ reg = <0x2>;
-+ };
-+ sgmii_phy1: ethernet-phy@3 {
-+ reg = <0x3>;
-+ };
-+ sgmii_phy2: ethernet-phy@4 {
-+ reg = <0x4>;
-+ };
-+ };
-+
-+ mdio@fd000 {
-+ aqr106_phy: ethernet-phy@1 {
-+ compatible = "ethernet-phy-ieee802.3-c45";
-+ interrupts = <0 131 4>;
-+ reg = <0x0>;
-+ };
-+ };
-+};
---- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
-+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
-@@ -51,13 +51,7 @@
- #size-cells = <2>;
-
- aliases {
-- ethernet0 = &fm1mac1;
-- ethernet1 = &fm1mac2;
-- ethernet2 = &fm1mac3;
-- ethernet3 = &fm1mac4;
-- ethernet4 = &fm1mac5;
-- ethernet5 = &fm1mac6;
-- ethernet6 = &fm1mac9;
-+ crypto = &crypto;
- };
-
- cpus {
-@@ -70,6 +64,7 @@
- reg = <0x0>;
- clocks = <&clockgen 1 0>;
- next-level-cache = <&l2>;
-+ cpu-idle-states = <&CPU_PH20>;
- };
-
- cpu1: cpu@1 {
-@@ -78,6 +73,7 @@
- reg = <0x1>;
- clocks = <&clockgen 1 0>;
- next-level-cache = <&l2>;
-+ cpu-idle-states = <&CPU_PH20>;
- };
-
- cpu2: cpu@2 {
-@@ -86,6 +82,7 @@
- reg = <0x2>;
- clocks = <&clockgen 1 0>;
- next-level-cache = <&l2>;
-+ cpu-idle-states = <&CPU_PH20>;
- };
-
- cpu3: cpu@3 {
-@@ -94,6 +91,7 @@
- reg = <0x3>;
- clocks = <&clockgen 1 0>;
- next-level-cache = <&l2>;
-+ cpu-idle-states = <&CPU_PH20>;
- };
-
- l2: l2-cache {
-@@ -101,6 +99,19 @@
- };
- };
-
-+ idle-states {
-+ entry-method = "arm,psci";
-+
-+ CPU_PH20: cpu-ph20 {
-+ compatible = "arm,idle-state";
-+ idle-state-name = "PH20";
-+ arm,psci-suspend-param = <0x00010000>;
-+ entry-latency-us = <1000>;
-+ exit-latency-us = <1000>;
-+ min-residency-us = <3000>;
-+ };
-+ };
-+
- memory@80000000 {
- device_type = "memory";
- reg = <0x0 0x80000000 0 0x80000000>;
-@@ -193,6 +204,49 @@
- bus-width = <4>;
- };
-
-+ crypto: crypto@1700000 {
-+ compatible = "fsl,sec-v5.4", "fsl,sec-v5.0",
-+ "fsl,sec-v4.0";
-+ fsl,sec-era = <8>;
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ ranges = <0x0 0x00 0x1700000 0x100000>;
-+ reg = <0x00 0x1700000 0x0 0x100000>;
-+ interrupts = <0 75 0x4>;
-+
-+ sec_jr0: jr@10000 {
-+ compatible = "fsl,sec-v5.4-job-ring",
-+ "fsl,sec-v5.0-job-ring",
-+ "fsl,sec-v4.0-job-ring";
-+ reg = <0x10000 0x10000>;
-+ interrupts = <0 71 0x4>;
-+ };
-+
-+ sec_jr1: jr@20000 {
-+ compatible = "fsl,sec-v5.4-job-ring",
-+ "fsl,sec-v5.0-job-ring",
-+ "fsl,sec-v4.0-job-ring";
-+ reg = <0x20000 0x10000>;
-+ interrupts = <0 72 0x4>;
-+ };
-+
-+ sec_jr2: jr@30000 {
-+ compatible = "fsl,sec-v5.4-job-ring",
-+ "fsl,sec-v5.0-job-ring",
-+ "fsl,sec-v4.0-job-ring";
-+ reg = <0x30000 0x10000>;
-+ interrupts = <0 73 0x4>;
-+ };
-+
-+ sec_jr3: jr@40000 {
-+ compatible = "fsl,sec-v5.4-job-ring",
-+ "fsl,sec-v5.0-job-ring",
-+ "fsl,sec-v4.0-job-ring";
-+ reg = <0x40000 0x10000>;
-+ interrupts = <0 74 0x4>;
-+ };
-+ };
-+
- qman: qman@1880000 {
- compatible = "fsl,qman";
- reg = <0x00 0x1880000 0x0 0x10000>;
-@@ -490,6 +544,19 @@
- fsl,qman-channel-id = <0x800>;
- };
-
-+ fman0_10g_rx1: port@91000 {
-+ cell-index = <1>;
-+ compatible = "fsl,fman-port-10g-rx";
-+ reg = <0x91000 0x1000>;
-+ };
-+
-+ fman0_10g_tx1: port@b1000 {
-+ cell-index = <1>;
-+ compatible = "fsl,fman-port-10g-tx";
-+ reg = <0xb1000 0x1000>;
-+ fsl,qman-channel-id = <0x801>;
-+ };
-+
- fm1mac9: ethernet@f0000 {
- cell-index = <0>;
- compatible = "fsl,fman-memac";
-@@ -497,6 +564,13 @@
- fsl,port-handles = <&fman0_10g_rx0 &fman0_10g_tx0>;
- };
-
-+ fm1mac10: ethernet@f2000 {
-+ cell-index = <1>;
-+ compatible = "fsl,fman-memac";
-+ reg = <0xf2000 0x1000>;
-+ fsl,port-handles = <&fman0_10g_rx1 &fman0_10g_tx1>;
-+ };
-+
- mdio@f1000 {
- #address-cells = <1>;
- #size-cells = <0>;
-@@ -504,6 +578,13 @@
- reg = <0xf1000 0x1000>;
- };
-
-+ mdio@f3000 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ compatible = "fsl,fman-memac-mdio";
-+ reg = <0xf3000 0x1000>;
-+ };
-+
- ptp_timer0: rtc@fe000 {
- compatible = "fsl,fman-rtc";
- reg = <0xfe000 0x1000>;
-@@ -657,7 +738,7 @@
- compatible = "fsl,ls1021a-lpuart";
- reg = <0x0 0x2950000 0x0 0x1000>;
- interrupts = <0 48 0x4>;
-- clocks = <&clockgen 0 0>;
-+ clocks = <&clockgen 4 0>;
- clock-names = "ipg";
- status = "disabled";
- };
-@@ -712,7 +793,7 @@
- reg = <0x0 0x29d0000 0x0 0x10000>;
- interrupts = <0 86 0x4>;
- big-endian;
-- rcpm-wakeup = <&rcpm 0x0 0x20000000>;
-+ rcpm-wakeup = <&rcpm 0x00020000 0x0>;
- status = "okay";
- };
-
-@@ -789,34 +870,34 @@
- big-endian;
- };
-
-- msi1: msi-controller@1580000 {
-- compatible = "fsl,1s1046a-msi";
-- reg = <0x0 0x1580000 0x0 0x10000>;
-+ msi: msi-controller@1580000 {
-+ compatible = "fsl,ls1046a-msi";
-+ #address-cells = <2>;
-+ #size-cells = <2>;
-+ ranges;
- msi-controller;
-- interrupts = <0 116 0x4>,
-- <0 111 0x4>,
-- <0 112 0x4>,
-- <0 113 0x4>;
-- };
-
-- msi2: msi-controller@1590000 {
-- compatible = "fsl,1s1046a-msi";
-- reg = <0x0 0x1590000 0x0 0x10000>;
-- msi-controller;
-- interrupts = <0 126 0x4>,
-- <0 121 0x4>,
-- <0 122 0x4>,
-- <0 123 0x4>;
-- };
--
-- msi3: msi-controller@15a0000 {
-- compatible = "fsl,1s1046a-msi";
-- reg = <0x0 0x15a0000 0x0 0x10000>;
-- msi-controller;
-- interrupts = <0 160 0x4>,
-- <0 155 0x4>,
-- <0 156 0x4>,
-- <0 157 0x4>;
-+ msi-bank@1580000 {
-+ reg = <0x0 0x1580000 0x0 0x10000>;
-+ interrupts = <0 116 0x4>,
-+ <0 111 0x4>,
-+ <0 112 0x4>,
-+ <0 113 0x4>;
-+ };
-+ msi-bank@1590000 {
-+ reg = <0x0 0x1590000 0x0 0x10000>;
-+ interrupts = <0 126 0x4>,
-+ <0 121 0x4>,
-+ <0 122 0x4>,
-+ <0 123 0x4>;
-+ };
-+ msi-bank@15a0000 {
-+ reg = <0x0 0x15a0000 0x0 0x10000>;
-+ interrupts = <0 160 0x4>,
-+ <0 155 0x4>,
-+ <0 156 0x4>,
-+ <0 157 0x4>;
-+ };
- };
-
- pcie@3400000 {
-@@ -826,15 +907,16 @@
- reg-names = "regs", "config";
- interrupts = <0 118 0x4>, /* controller interrupt */
- <0 117 0x4>; /* PME interrupt */
-- interrupt-names = "intr", "pme";
-+ interrupt-names = "aer";
- #address-cells = <3>;
- #size-cells = <2>;
- device_type = "pci";
-+ dma-coherent;
- num-lanes = <4>;
- bus-range = <0x0 0xff>;
- ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
- 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
-- msi-parent = <&msi1>;
-+ msi-parent = <&msi>;
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 7>;
- interrupt-map = <0000 0 0 1 &gic 0 110 0x4>,
-@@ -850,15 +932,16 @@
- reg-names = "regs", "config";
- interrupts = <0 128 0x4>,
- <0 127 0x4>;
-- interrupt-names = "intr", "pme";
-+ interrupt-names = "aer";
- #address-cells = <3>;
- #size-cells = <2>;
- device_type = "pci";
-+ dma-coherent;
- num-lanes = <2>;
- bus-range = <0x0 0xff>;
- ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
- 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
-- msi-parent = <&msi2>;
-+ msi-parent = <&msi>;
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 7>;
- interrupt-map = <0000 0 0 1 &gic 0 120 0x4>,
-@@ -874,15 +957,16 @@
- reg-names = "regs", "config";
- interrupts = <0 162 0x4>,
- <0 161 0x4>;
-- interrupt-names = "intr", "pme";
-+ interrupt-names = "aer";
- #address-cells = <3>;
- #size-cells = <2>;
- device_type = "pci";
-+ dma-coherent;
- num-lanes = <2>;
- bus-range = <0x0 0xff>;
- ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */
- 0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
-- msi-parent = <&msi3>;
-+ msi-parent = <&msi>;
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 7>;
- interrupt-map = <0000 0 0 1 &gic 0 154 0x4>,
-@@ -894,14 +978,6 @@
-
- fsl,dpaa {
- compatible = "fsl,ls1046a-dpaa", "simple-bus", "fsl,dpaa";
-- ethernet@0 {
-- compatible = "fsl,dpa-ethernet";
-- fsl,fman-mac = <&fm1mac1>;
-- };
-- ethernet@1 {
-- compatible = "fsl,dpa-ethernet";
-- fsl,fman-mac = <&fm1mac2>;
-- };
- ethernet@2 {
- compatible = "fsl,dpa-ethernet";
- fsl,fman-mac = <&fm1mac3>;
-@@ -922,6 +998,10 @@
- compatible = "fsl,dpa-ethernet";
- fsl,fman-mac = <&fm1mac9>;
- };
-+ ethernet@9 {
-+ compatible = "fsl,dpa-ethernet";
-+ fsl,fman-mac = <&fm1mac10>;
-+ };
- };
-
- qportals: qman-portals@500000000 {
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-17 08:59:55 +0000