diff options
Diffstat (limited to 'target/linux/layerscape/patches-5.4/701-net-0279-enetc-Set-MDIO_CFG_HOLD-to-the-recommended-value-of-.patch')
| -rw-r--r-- | target/linux/layerscape/patches-5.4/701-net-0279-enetc-Set-MDIO_CFG_HOLD-to-the-recommended-value-of-.patch | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/target/linux/layerscape/patches-5.4/701-net-0279-enetc-Set-MDIO_CFG_HOLD-to-the-recommended-value-of-.patch b/target/linux/layerscape/patches-5.4/701-net-0279-enetc-Set-MDIO_CFG_HOLD-to-the-recommended-value-of-.patch new file mode 100644 index 0000000000..02ead2712f --- /dev/null +++ b/target/linux/layerscape/patches-5.4/701-net-0279-enetc-Set-MDIO_CFG_HOLD-to-the-recommended-value-of-.patch @@ -0,0 +1,58 @@ +From 5961ca6738507031a64f8580ceb8ab0b630d47a5 Mon Sep 17 00:00:00 2001 +From: Vladimir Oltean <vladimir.oltean@nxp.com> +Date: Wed, 27 Nov 2019 19:21:13 +0200 +Subject: [PATCH] enetc: Set MDIO_CFG_HOLD to the recommended value of 2 + +This increases the MDIO hold time to 5 enet_clk cycles from the previous +value of 0. This is actually the out-of-reset value, that the driver was +previously overwriting with 0. Zero worked for the external MDIO, but +breaks communication with the internal MDIO buses on which the PCS of +ENETC SI's and Felix switch are found. + +Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> +--- + drivers/net/ethernet/freescale/enetc/enetc_mdio.c | 12 ++++++++---- + 1 file changed, 8 insertions(+), 4 deletions(-) + +--- a/drivers/net/ethernet/freescale/enetc/enetc_mdio.c ++++ b/drivers/net/ethernet/freescale/enetc/enetc_mdio.c +@@ -31,15 +31,19 @@ static inline void _enetc_mdio_wr(struct + _enetc_mdio_wr(mdio_priv, ENETC_##off, val) + #define enetc_mdio_rd_reg(off) enetc_mdio_rd(mdio_priv, off) + +-#define ENETC_MDC_DIV 258 +- + #define MDIO_CFG_CLKDIV(x) ((((x) >> 1) & 0xff) << 8) + #define MDIO_CFG_BSY BIT(0) + #define MDIO_CFG_RD_ER BIT(1) ++#define MDIO_CFG_HOLD(x) (((x) << 2) & GENMASK(4, 2)) + #define MDIO_CFG_ENC45 BIT(6) + /* external MDIO only - driven on neg MDC edge */ + #define MDIO_CFG_NEG BIT(23) + ++#define ENETC_EMDIO_CFG \ ++ (MDIO_CFG_HOLD(2) | \ ++ MDIO_CFG_CLKDIV(258) | \ ++ MDIO_CFG_NEG) ++ + #define MDIO_CTL_DEV_ADDR(x) ((x) & 0x1f) + #define MDIO_CTL_PORT_ADDR(x) (((x) & 0x1f) << 5) + #define MDIO_CTL_READ BIT(15) +@@ -61,7 +65,7 @@ int enetc_mdio_write(struct mii_bus *bus + u16 dev_addr; + int ret; + +- mdio_cfg = MDIO_CFG_CLKDIV(ENETC_MDC_DIV) | MDIO_CFG_NEG; ++ mdio_cfg = ENETC_EMDIO_CFG; + if (regnum & MII_ADDR_C45) { + dev_addr = (regnum >> 16) & 0x1f; + mdio_cfg |= MDIO_CFG_ENC45; +@@ -108,7 +112,7 @@ int enetc_mdio_read(struct mii_bus *bus, + u16 dev_addr, value; + int ret; + +- mdio_cfg = MDIO_CFG_CLKDIV(ENETC_MDC_DIV) | MDIO_CFG_NEG; ++ mdio_cfg = ENETC_EMDIO_CFG; + if (regnum & MII_ADDR_C45) { + dev_addr = (regnum >> 16) & 0x1f; + mdio_cfg |= MDIO_CFG_ENC45; |