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-rw-r--r--target/linux/mediatek/files/arch/arm/boot/dts/_mt7623.dtsi804
-rw-r--r--target/linux/mediatek/files/arch/arm/boot/dts/mt6323.dtsi241
-rw-r--r--target/linux/mediatek/files/arch/arm/boot/dts/mt7623-NAND-ePHY.dts523
-rw-r--r--target/linux/mediatek/files/arch/arm/boot/dts/mt7623-NAND.dts553
-rw-r--r--target/linux/mediatek/files/arch/arm/boot/dts/mt7623-eMMC.dts547
-rw-r--r--target/linux/mediatek/files/arch/arm/boot/dts/mt7623-evb.dts50
-rw-r--r--target/linux/mediatek/files/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts443
7 files changed, 0 insertions, 3161 deletions
diff --git a/target/linux/mediatek/files/arch/arm/boot/dts/_mt7623.dtsi b/target/linux/mediatek/files/arch/arm/boot/dts/_mt7623.dtsi
deleted file mode 100644
index 620ad95e76..0000000000
--- a/target/linux/mediatek/files/arch/arm/boot/dts/_mt7623.dtsi
+++ /dev/null
@@ -1,804 +0,0 @@
-/*
- * Copyright (c) 2016 MediaTek Inc.
- * Author: John Crispin <blogic@openwrt.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/clock/mt2701-clk.h>
-#include <dt-bindings/power/mt2701-power.h>
-#include <dt-bindings/phy/phy.h>
-#include <dt-bindings/reset/mt2701-resets.h>
-#include <dt-bindings/pinctrl/mt7623-pinfunc.h>
-#include <dt-bindings/gpio/gpio.h>
-#include "skeleton64.dtsi"
-
-
-/ {
- compatible = "mediatek,mt7623";
- interrupt-parent = <&sysirq>;
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
- enable-method = "mediatek,mt6589-smp";
-
- cpu0: cpu@0 {
- device_type = "cpu";
- compatible = "arm,cortex-a7";
- reg = <0x0>;
- clocks = <&infracfg CLK_INFRA_CPUSEL>,
- <&apmixedsys CLK_APMIXED_MAINPLL>;
- clock-names = "cpu", "intermediate";
- operating-points = <
- 598000 1150000
- 747500 1150000
- 1040000 1150000
- 1196000 1200000
- 1300000 1300000
- >;
- };
- cpu1: cpu@1 {
- device_type = "cpu";
- compatible = "arm,cortex-a7";
- reg = <0x1>;
- clocks = <&infracfg CLK_INFRA_CPUSEL>,
- <&apmixedsys CLK_APMIXED_MAINPLL>;
- clock-names = "cpu", "intermediate";
- operating-points = <
- 598000 1150000
- 747500 1150000
- 1040000 1150000
- 1196000 1200000
- 1300000 1300000
- >;
- };
- cpu2: cpu@2 {
- device_type = "cpu";
- compatible = "arm,cortex-a7";
- reg = <0x2>;
- clocks = <&infracfg CLK_INFRA_CPUSEL>,
- <&apmixedsys CLK_APMIXED_MAINPLL>;
- clock-names = "cpu", "intermediate";
- operating-points = <
- 598000 1150000
- 747500 1150000
- 1040000 1150000
- 1196000 1200000
- 1300000 1300000
- >;
- };
- cpu3: cpu@3 {
- device_type = "cpu";
- compatible = "arm,cortex-a7";
- reg = <0x3>;
- clocks = <&infracfg CLK_INFRA_CPUSEL>,
- <&apmixedsys CLK_APMIXED_MAINPLL>;
- clock-names = "cpu", "intermediate";
- operating-points = <
- 598000 1150000
- 747500 1150000
- 1040000 1150000
- 1196000 1200000
- 1300000 1300000
- >;
- };
- };
-
- system_clk: dummy13m {
- compatible = "fixed-clock";
- clock-frequency = <13000000>;
- #clock-cells = <0>;
- };
-
- rtc_clk: dummy32k {
- compatible = "fixed-clock";
- clock-frequency = <32000>;
- #clock-cells = <0>;
- clock-output-names = "clk32k";
- };
-
- clk26m: dummy26m {
- compatible = "fixed-clock";
- clock-frequency = <26000000>;
- #clock-cells = <0>;
- clock-output-names = "clk26m";
- };
-
- timer {
- compatible = "arm,armv7-timer";
- interrupt-parent = <&gic>;
- interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
- <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
- <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
- <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
- clock-frequency = <13000000>;
- arm,cpu-registers-not-fw-configured;
- };
-
- topckgen: power-controller@10000000 {
- compatible = "mediatek,mt7623-topckgen",
- "mediatek,mt2701-topckgen",
- "syscon";
- reg = <0 0x10000000 0 0x1000>;
- #clock-cells = <1>;
- };
-
- infracfg: power-controller@10001000 {
- compatible = "mediatek,mt7623-infracfg",
- "mediatek,mt2701-infracfg",
- "syscon";
- reg = <0 0x10001000 0 0x1000>;
- #clock-cells = <1>;
- #reset-cells = <1>;
- };
-
- pericfg: pericfg@10003000 {
- compatible = "mediatek,mt7623-pericfg",
- "mediatek,mt2701-pericfg",
- "syscon";
- reg = <0 0x10003000 0 0x1000>;
- #clock-cells = <1>;
- #reset-cells = <1>;
- };
-
- pio: pinctrl@10005000 {
- compatible = "mediatek,mt7623-pinctrl";
- reg = <0 0x1000b000 0 0x1000>;
- mediatek,pctl-regmap = <&syscfg_pctl_a>;
- pins-are-numbered;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- interrupt-parent = <&gic>;
- #interrupt-cells = <2>;
- interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- syscfg_pctl_a: syscfg@10005000 {
- compatible = "mediatek,mt7623-pctl-a-syscfg",
- "mediatek,mt2701-pctl-a-syscfg",
- "syscon";
- reg = <0 0x10005000 0 0x1000>;
- };
-
- scpsys: scpsys@10006000 {
- #power-domain-cells = <1>;
- compatible = "mediatek,mt7623-scpsys",
- "mediatek,mt2701-scpsys";
- reg = <0 0x10006000 0 0x1000>;
- infracfg = <&infracfg>;
- clocks = <&clk26m>,
- <&topckgen CLK_TOP_MM_SEL>,
- <&topckgen CLK_TOP_ETHIF_SEL>;
- clock-names = "mfg", "mm", "ethif";
- };
-
- watchdog: watchdog@10007000 {
- compatible = "mediatek,mt7623-wdt",
- "mediatek,mt6589-wdt";
- reg = <0 0x10007000 0 0x100>;
- };
-
- timer: timer@10008000 {
- compatible = "mediatek,mt7623-timer",
- "mediatek,mt6577-timer";
- reg = <0 0x10008000 0 0x80>;
- interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&system_clk>, <&rtc_clk>;
- clock-names = "system-clk", "rtc-clk";
- };
-
- pwrap: pwrap@1000d000 {
- compatible = "mediatek,mt7623-pwrap",
- "mediatek,mt2701-pwrap";
- reg = <0 0x1000d000 0 0x1000>;
- reg-names = "pwrap";
- interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
- resets = <&infracfg MT2701_INFRA_PMIC_WRAP_RST>;
- reset-names = "pwrap";
- clocks = <&infracfg CLK_INFRA_PMICSPI>,
- <&infracfg CLK_INFRA_PMICWRAP>;
- clock-names = "spi", "wrap";
- };
-
- cir: cir@10013000 {
- compatible = "mediatek,mt7623-cir";
- reg = <0 0x10013000 0 0x1000>;
- interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&infracfg CLK_INFRA_IRRX>;
- clock-names = "clk";
- status = "disabled";
- };
-
- sysirq: interrupt-controller@10200100 {
- compatible = "mediatek,mt7623-sysirq",
- "mediatek,mt6577-sysirq";
- interrupt-controller;
- #interrupt-cells = <3>;
- interrupt-parent = <&gic>;
- reg = <0 0x10200100 0 0x1c>;
- };
-
- efuse: efuse@10206000 {
- compatible = "mediatek,mt7623-efuse",
- "mediatek,efuse";
- reg = <0 0x10206000 0 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- /* Data cells */
- thermal_calibration: calib@424 {
- reg = <0x424 0xc>;
- };
- };
-
- apmixedsys: apmixedsys@10209000 {
- compatible = "mediatek,mt7623-apmixedsys",
- "mediatek,mt2701-apmixedsys";
- reg = <0 0x10209000 0 0x1000>;
- #clock-cells = <1>;
- };
-
- rng: rng@1020f000 {
- compatible = "mediatek,mt7623-rng";
- reg = <0 0x1020f000 0 0x1000>;
- clocks = <&infracfg CLK_INFRA_TRNG>;
- clock-names = "rng";
- };
-
- gic: interrupt-controller@10211000 {
- compatible = "arm,cortex-a7-gic";
- interrupt-controller;
- #interrupt-cells = <3>;
- interrupt-parent = <&gic>;
- reg = <0 0x10211000 0 0x1000>,
- <0 0x10212000 0 0x1000>,
- <0 0x10214000 0 0x2000>,
- <0 0x10216000 0 0x2000>;
- };
-
- auxadc: adc@11001000 {
- compatible = "mediatek,mt7623-auxadc",
- "mediatek,mt2701-auxadc";
- reg = <0 0x11001000 0 0x1000>;
- clocks = <&pericfg CLK_PERI_AUXADC>;
- clock-names = "main";
- #io-channel-cells = <1>;
- };
-
- uart0: serial@11002000 {
- compatible = "mediatek,mt7623-uart",
- "mediatek,mt6577-uart";
- reg = <0 0x11002000 0 0x400>;
- interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&pericfg CLK_PERI_UART0_SEL>,
- <&pericfg CLK_PERI_UART0>;
- clock-names = "baud", "bus";
- status = "disabled";
- };
-
- uart1: serial@11003000 {
- compatible = "mediatek,mt7623-uart",
- "mediatek,mt6577-uart";
- reg = <0 0x11003000 0 0x400>;
- interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&pericfg CLK_PERI_UART1_SEL>,
- <&pericfg CLK_PERI_UART1>;
- clock-names = "baud", "bus";
- status = "disabled";
- };
-
- uart2: serial@11004000 {
- compatible = "mediatek,mt7623-uart",
- "mediatek,mt6577-uart";
- reg = <0 0x11004000 0 0x400>;
- interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&pericfg CLK_PERI_UART2_SEL>,
- <&pericfg CLK_PERI_UART2>;
- clock-names = "baud", "bus";
- status = "disabled";
- };
-
- uart3: serial@11005000 {
- compatible = "mediatek,mt7623-uart",
- "mediatek,mt6577-uart";
- reg = <0 0x11005000 0 0x400>;
- interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&pericfg CLK_PERI_UART3_SEL>,
- <&pericfg CLK_PERI_UART3>;
- clock-names = "baud", "bus";
- status = "disabled";
- };
-
- pwm: pwm@11006000 {
- compatible = "mediatek,mt7623-pwm";
-
- reg = <0 0x11006000 0 0x1000>;
- resets = <&pericfg MT2701_PERI_PWM_SW_RST>;
- reset-names = "pwm";
-
- #pwm-cells = <2>;
- clocks = <&topckgen CLK_TOP_PWM_SEL>,
- <&pericfg CLK_PERI_PWM>,
- <&pericfg CLK_PERI_PWM1>,
- <&pericfg CLK_PERI_PWM2>,
- <&pericfg CLK_PERI_PWM3>,
- <&pericfg CLK_PERI_PWM4>,
- <&pericfg CLK_PERI_PWM5>;
- clock-names = "top", "main", "pwm1", "pwm2",
- "pwm3", "pwm4", "pwm5";
-
- status = "disabled";
- };
-
- i2c0: i2c@11007000 {
- compatible = "mediatek,mt7623-i2c",
- "mediatek,mt6577-i2c";
- reg = <0 0x11007000 0 0x70>,
- <0 0x11000200 0 0x80>;
- interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_LOW>;
- clock-div = <16>;
- clocks = <&pericfg CLK_PERI_I2C0>,
- <&pericfg CLK_PERI_AP_DMA>;
- clock-names = "main", "dma";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c1: i2c@11008000 {
- compatible = "mediatek,mt7623-i2c",
- "mediatek,mt6577-i2c";
- reg = <0 0x11008000 0 0x70>,
- <0 0x11000280 0 0x80>;
- interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_LOW>;
- clock-div = <16>;
- clocks = <&pericfg CLK_PERI_I2C1>,
- <&pericfg CLK_PERI_AP_DMA>;
- clock-names = "main", "dma";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c2: i2c@11009000 {
- compatible = "mediatek,mt7623-i2c",
- "mediatek,mt6577-i2c";
- reg = <0 0x11009000 0 0x70>,
- <0 0x11000300 0 0x80>;
- interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_LOW>;
- clock-div = <16>;
- clocks = <&pericfg CLK_PERI_I2C2>,
- <&pericfg CLK_PERI_AP_DMA>;
- clock-names = "main", "dma";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- spi0: spi@1100a000 {
- compatible = "mediatek,mt7623-spi",
- "mediatek,mt6589-spi";
- reg = <0 0x1100a000 0 0x1000>;
- interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&pericfg CLK_PERI_SPI0>;
- clock-names = "main";
-
- status = "disabled";
- };
-
- thermal: thermal@1100b000 {
- #thermal-sensor-cells = <1>;
- compatible = "mediatek,mt2701-thermal",
- "mediatek,mt2701-thermal";
- reg = <0 0x1100b000 0 0x1000>;
- interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&pericfg CLK_PERI_THERM>,
- <&pericfg CLK_PERI_AUXADC>;
- clock-names = "therm", "auxadc";
- resets = <&pericfg MT2701_PERI_THERM_SW_RST>;
- reset-names = "therm";
- mediatek,auxadc = <&auxadc>;
- mediatek,apmixedsys = <&apmixedsys>;
-
- nvmem-cells = <&thermal_calibration>;
- nvmem-cell-names = "calibration-data";
- };
-
- spi1: spi@11016000 {
- compatible = "mediatek,mt7623-spi",
- "mediatek,mt2701-spi";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0 0x11016000 0 0x100>;
- interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
- <&topckgen CLK_TOP_SPI1_SEL>,
- <&pericfg CLK_PERI_SPI1>;
- clock-names = "parent-clk", "sel-clk", "spi-clk";
- status = "disabled";
- };
-
- spi2: spi@11017000 {
- compatible = "mediatek,mt7623-spi",
- "mediatek,mt2701-spi";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0 0x11017000 0 0x1000>;
- interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
- <&topckgen CLK_TOP_SPI2_SEL>,
- <&pericfg CLK_PERI_SPI2>;
- clock-names = "parent-clk", "sel-clk", "spi-clk";
- status = "disabled";
- };
-
- nandc: nfi@1100d000 {
- compatible = "mediatek,mt7623-nfc",
- "mediatek,mt2701-nfc";
- reg = <0 0x1100d000 0 0x1000>;
- power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>;
- interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&pericfg CLK_PERI_NFI>,
- <&pericfg CLK_PERI_NFI_PAD>;
- clock-names = "nfi_clk", "pad_clk";
- status = "disabled";
- ecc-engine = <&bch>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- bch: ecc@1100e000 {
- compatible = "mediatek,mt7623-ecc",
- "mediatek,mt2701-ecc";
- reg = <0 0x1100e000 0 0x1000>;
- interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&pericfg CLK_PERI_NFI_ECC>;
- clock-names = "nfiecc_clk";
- status = "disabled";
- };
-
- afe: audio-controller@11220000 {
- compatible = "mediatek,mt7623-audio",
- "mediatek,mt2701-audio";
- reg = <0 0x11220000 0 0x2000>,
- <0 0x112a0000 0 0x20000>;
- interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_LOW>;
- power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>;
-
- clocks = <&infracfg CLK_INFRA_AUDIO>,
- <&topckgen CLK_TOP_AUD_MUX1_SEL>,
- <&topckgen CLK_TOP_AUD_MUX2_SEL>,
- <&topckgen CLK_TOP_AUD_MUX1_DIV>,
- <&topckgen CLK_TOP_AUD_MUX2_DIV>,
- <&topckgen CLK_TOP_AUD_48K_TIMING>,
- <&topckgen CLK_TOP_AUD_44K_TIMING>,
- <&topckgen CLK_TOP_AUDPLL_MUX_SEL>,
- <&topckgen CLK_TOP_APLL_SEL>,
- <&topckgen CLK_TOP_AUD1PLL_98M>,
- <&topckgen CLK_TOP_AUD2PLL_90M>,
- <&topckgen CLK_TOP_HADDS2PLL_98M>,
- <&topckgen CLK_TOP_HADDS2PLL_294M>,
- <&topckgen CLK_TOP_AUDPLL>,
- <&topckgen CLK_TOP_AUDPLL_D4>,
- <&topckgen CLK_TOP_AUDPLL_D8>,
- <&topckgen CLK_TOP_AUDPLL_D16>,
- <&topckgen CLK_TOP_AUDPLL_D24>,
- <&topckgen CLK_TOP_AUDINTBUS_SEL>,
- <&clk26m>,
- <&topckgen CLK_TOP_SYSPLL1_D4>,
- <&topckgen CLK_TOP_AUD_K1_SRC_SEL>,
- <&topckgen CLK_TOP_AUD_K2_SRC_SEL>,
- <&topckgen CLK_TOP_AUD_K3_SRC_SEL>,
- <&topckgen CLK_TOP_AUD_K4_SRC_SEL>,
- <&topckgen CLK_TOP_AUD_K5_SRC_SEL>,
- <&topckgen CLK_TOP_AUD_K6_SRC_SEL>,
- <&topckgen CLK_TOP_AUD_K1_SRC_DIV>,
- <&topckgen CLK_TOP_AUD_K2_SRC_DIV>,
- <&topckgen CLK_TOP_AUD_K3_SRC_DIV>,
- <&topckgen CLK_TOP_AUD_K4_SRC_DIV>,
- <&topckgen CLK_TOP_AUD_K5_SRC_DIV>,
- <&topckgen CLK_TOP_AUD_K6_SRC_DIV>,
- <&topckgen CLK_TOP_AUD_I2S1_MCLK>,
- <&topckgen CLK_TOP_AUD_I2S2_MCLK>,
- <&topckgen CLK_TOP_AUD_I2S3_MCLK>,
- <&topckgen CLK_TOP_AUD_I2S4_MCLK>,
- <&topckgen CLK_TOP_AUD_I2S5_MCLK>,
- <&topckgen CLK_TOP_AUD_I2S6_MCLK>,
- <&topckgen CLK_TOP_ASM_M_SEL>,
- <&topckgen CLK_TOP_ASM_H_SEL>,
- <&topckgen CLK_TOP_UNIVPLL2_D4>,
- <&topckgen CLK_TOP_UNIVPLL2_D2>,
- <&topckgen CLK_TOP_SYSPLL_D5>;
- clock-names = "infra_sys_audio_clk",
- "top_audio_mux1_sel",
- "top_audio_mux2_sel",
- "top_audio_mux1_div",
- "top_audio_mux2_div",
- "top_audio_48k_timing",
- "top_audio_44k_timing",
- "top_audpll_mux_sel",
- "top_apll_sel",
- "top_aud1_pll_98M",
- "top_aud2_pll_90M",
- "top_hadds2_pll_98M",
- "top_hadds2_pll_294M",
- "top_audpll",
- "top_audpll_d4",
- "top_audpll_d8",
- "top_audpll_d16",
- "top_audpll_d24",
- "top_audintbus_sel",
- "clk_26m",
- "top_syspll1_d4",
- "top_aud_k1_src_sel",
- "top_aud_k2_src_sel",
- "top_aud_k3_src_sel",
- "top_aud_k4_src_sel",
- "top_aud_k5_src_sel",
- "top_aud_k6_src_sel",
- "top_aud_k1_src_div",
- "top_aud_k2_src_div",
- "top_aud_k3_src_div",
- "top_aud_k4_src_div",
- "top_aud_k5_src_div",
- "top_aud_k6_src_div",
- "top_aud_i2s1_mclk",
- "top_aud_i2s2_mclk",
- "top_aud_i2s3_mclk",
- "top_aud_i2s4_mclk",
- "top_aud_i2s5_mclk",
- "top_aud_i2s6_mclk",
- "top_asm_m_sel",
- "top_asm_h_sel",
- "top_univpll2_d4",
- "top_univpll2_d2",
- "top_syspll_d5";
- };
-
- mmc0: mmc@11230000 {
- compatible = "mediatek,mt7623-mmc",
- "mediatek,mt8135-mmc";
- reg = <0 0x11230000 0 0x1000>;
- interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&pericfg CLK_PERI_MSDC30_0>,
- <&topckgen CLK_TOP_MSDC30_0_SEL>;
- clock-names = "source", "hclk";
- status = "disabled";
- };
-
- mmc1: mmc@11240000 {
- compatible = "mediatek,mt7623-mmc",
- "mediatek,mt8135-mmc";
- reg = <0 0x11240000 0 0x1000>;
- interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&pericfg CLK_PERI_MSDC30_1>,
- <&topckgen CLK_TOP_MSDC30_1_SEL>;
- clock-names = "source", "hclk";
- status = "disabled";
- };
-
- usb1: usb@1a1c0000 {
- compatible = "mediatek,mt7623-xhci",
- "mediatek,mt8173-xhci";
- reg = <0 0x1a1c0000 0 0x1000>,
- <0 0x1a1c4700 0 0x0100>;
- interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&hifsys CLK_HIFSYS_USB0PHY>,
- <&topckgen CLK_TOP_ETHIF_SEL>;
- clock-names = "sys_ck", "ethif";
- power-domains = <&scpsys MT2701_POWER_DOMAIN_HIF>;
- phys = <&phy_port0 PHY_TYPE_USB3>;
- status = "disabled";
- };
-
- u3phy1: usb-phy@1a1c4000 {
- compatible = "mediatek,mt2701-u3phy",
- "mediatek,mt8173-u3phy";
- reg = <0 0x1a1c4000 0 0x0700>;
- clocks = <&clk26m>;
- clock-names = "u3phya_ref";
- #phy-cells = <1>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
- status = "disabled";
-
- phy_port0: phy_port0: port@1a1c4800 {
- reg = <0 0x1a1c4800 0 0x800>;
- #phy-cells = <1>;
- status = "okay";
- };
- };
-
- usb2: usb@1a240000 {
- compatible = "mediatek,mt2701-xhci",
- "mediatek,mt8173-xhci";
- reg = <0 0x1a240000 0 0x1000>,
- <0 0x1a244700 0 0x0100>;
- interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&hifsys CLK_HIFSYS_USB1PHY>,
- <&topckgen CLK_TOP_ETHIF_SEL>;
- clock-names = "sys_ck", "ethif";
- power-domains = <&scpsys MT2701_POWER_DOMAIN_HIF>;
- phys = <&u3phy2 0>;
- status = "disabled";
- };
-
- u3phy2: usb-phy@1a244000 {
- compatible = "mediatek,mt2701-u3phy",
- "mediatek,mt8173-u3phy";
- reg = <0 0x1a244000 0 0x0700>,
- <0 0x1a244800 0 0x0800>;
- clocks = <&clk26m>;
- clock-names = "u3phya_ref";
- #phy-cells = <1>;
- status = "disabled";
- };
-
- hifsys: clock-controller@1a000000 {
- compatible = "mediatek,mt7623-hifsys",
- "mediatek,mt2701-hifsys",
- "syscon";
- reg = <0 0x1a000000 0 0x1000>;
- #clock-cells = <1>;
- #reset-cells = <1>;
- };
-
- pcie: pcie@1a140000 {
- compatible = "mediatek,mt7623-pcie";
- device_type = "pci";
- reg = <0 0x1a140000 0 0x8000>, /* PCI-Express registers */
- <0 0x1a149000 0 0x1000>, /* PCI-Express PHY0 */
- <0 0x1a14a000 0 0x1000>, /* PCI-Express PHY1 */
- <0 0x1a244000 0 0x1000>; /* PCI-Express PHY2 */
- reg-names = "pcie", "pcie phy0", "pcie phy1", "pcie phy2";
- interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_LOW>,
- <GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>,
- <GIC_SPI 195 IRQ_TYPE_LEVEL_LOW>;
- interrupt-names = "pcie0", "pcie1", "pcie2";
- clocks = <&topckgen CLK_TOP_ETHIF_SEL>;
- clock-names = "pcie";
- power-domains = <&scpsys MT2701_POWER_DOMAIN_HIF>;
- resets = <&hifsys MT2701_HIFSYS_PCIE0_RST>,
- <&hifsys MT2701_HIFSYS_PCIE1_RST>,
- <&hifsys MT2701_HIFSYS_PCIE2_RST>;
- reset-names = "pcie0", "pcie1", "pcie2";
-
- mediatek,hifsys = <&hifsys>;
-
- bus-range = <0x00 0xff>;
- #address-cells = <3>;
- #size-cells = <2>;
-
- ranges = <0x81000000 0 0x1a160000 0 0x1a160000 0 0x00010000 /* io space */
- 0x83000000 0 0x60000000 0 0x60000000 0 0x10000000>; /* pci memory */
-
- status = "disabled";
-
- pcie@1,0 {
- device_type = "pci";
- reg = <0x0800 0 0 0 0>;
-
- #address-cells = <3>;
- #size-cells = <2>;
- ranges;
- };
-
- pcie@2,0{
- device_type = "pci";
- reg = <0x1000 0 0 0 0>;
-
- #address-cells = <3>;
- #size-cells = <2>;
- ranges;
- };
-
- pcie@3,0{
- device_type = "pci";
- reg = <0x1800 0 0 0 0>;
-
- #address-cells = <3>;
- #size-cells = <2>;
- ranges;
- };
- };
-
- ethsys: syscon@1b000000 {
- compatible = "mediatek,mt7623-ethsys",
- "mediatek,mt2701-ethsys",
- "syscon";
- reg = <0 0x1b000000 0 0x1000>;
- #reset-cells = <1>;
- #clock-cells = <1>;
- };
-
- eth: ethernet@1b100000 {
- compatible = "mediatek,mt7623-eth",
- "mediatek,mt2701-eth",
- "syscon";
- reg = <0 0x1b100000 0 0x20000>;
-
- clocks = <&topckgen CLK_TOP_ETHIF_SEL>,
- <&ethsys CLK_ETHSYS_ESW>,
- <&ethsys CLK_ETHSYS_GP2>,
- <&ethsys CLK_ETHSYS_GP1>,
- <&apmixedsys CLK_APMIXED_TRGPLL>;
- clock-names = "ethif", "esw", "gp2", "gp1", "trgpll";
- interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_LOW
- GIC_SPI 199 IRQ_TYPE_LEVEL_LOW
- GIC_SPI 198 IRQ_TYPE_LEVEL_LOW>;
- power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>;
-
- resets = <&ethsys 6>;
- reset-names = "eth";
-
- mediatek,ethsys = <&ethsys>;
- mediatek,pctl = <&syscfg_pctl_a>;
-
- #address-cells = <1>;
- #size-cells = <0>;
-
- status = "disabled";
-
- gmac1: mac@0 {
- compatible = "mediatek,eth-mac";
- reg = <0>;
-
- status = "disabled";
-
- phy-mode = "trgmii";
-
- fixed-link {
- speed = <1000>;
- full-duplex;
- pause;
- };
- };
-
- gmac2: mac@1 {
- compatible = "mediatek,eth-mac";
- reg = <1>;
-
- status = "disabled";
- };
-
- mdio0: mdio-bus {
- #address-cells = <1>;
- #size-cells = <0>;
- };
- };
-
- hnat: hnat@1b000000 {
- compatible = "mediatek,mt7623-hnat";
- reg = <0 0x1b100000 0 0x3000>;
- mtketh-wan = "eth1";
- resets = <&ethsys 0>;
- reset-names = "mtketh";
- };
-
- crypto: crypto@1b240000 {
- compatible = "mediatek,mt7623-crypto", "mediatek,eip97-crypto";
- reg = <0 0x1b240000 0 0x20000>;
- interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_LOW>,
- <GIC_SPI 83 IRQ_TYPE_LEVEL_LOW>,
- <GIC_SPI 84 IRQ_TYPE_LEVEL_LOW>,
- <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>,
- <GIC_SPI 97 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&topckgen CLK_TOP_ETHIF_SEL>,
- <&ethsys CLK_ETHSYS_CRYPTO>;
- clock-names = "ethif","cryp";
- power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>;
- };
-};
diff --git a/target/linux/mediatek/files/arch/arm/boot/dts/mt6323.dtsi b/target/linux/mediatek/files/arch/arm/boot/dts/mt6323.dtsi
deleted file mode 100644
index 7c783d6c75..0000000000
--- a/target/linux/mediatek/files/arch/arm/boot/dts/mt6323.dtsi
+++ /dev/null
@@ -1,241 +0,0 @@
-/*
- * Copyright (c) 2017 MediaTek Inc.
- * Author: John Crispin <john@phrozen.org>
- * Sean Wang <sean.wang@mediatek.com>
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-&pwrap {
- pmic: mt6323 {
- compatible = "mediatek,mt6323";
- interrupt-parent = <&pio>;
- interrupts = <150 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-controller;
- #interrupt-cells = <2>;
-
- mt6323regulator: mt6323regulator{
- compatible = "mediatek,mt6323-regulator";
-
- mt6323_vproc_reg: buck_vproc{
- regulator-name = "vproc";
- regulator-min-microvolt = < 700000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <12500>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- mt6323_vsys_reg: buck_vsys{
- regulator-name = "vsys";
- regulator-min-microvolt = <1400000>;
- regulator-max-microvolt = <2987500>;
- regulator-ramp-delay = <25000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- mt6323_vpa_reg: buck_vpa{
- regulator-name = "vpa";
- regulator-min-microvolt = < 500000>;
- regulator-max-microvolt = <3650000>;
- };
-
- mt6323_vtcxo_reg: ldo_vtcxo{
- regulator-name = "vtcxo";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- regulator-enable-ramp-delay = <90>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- mt6323_vcn28_reg: ldo_vcn28{
- regulator-name = "vcn28";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- regulator-enable-ramp-delay = <185>;
- };
-
- mt6323_vcn33_bt_reg: ldo_vcn33_bt{
- regulator-name = "vcn33_bt";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3600000>;
- regulator-enable-ramp-delay = <185>;
- };
-
- mt6323_vcn33_wifi_reg: ldo_vcn33_wifi{
- regulator-name = "vcn33_wifi";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3600000>;
- regulator-enable-ramp-delay = <185>;
- };
-
- mt6323_va_reg: ldo_va{
- regulator-name = "va";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- regulator-enable-ramp-delay = <216>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- mt6323_vcama_reg: ldo_vcama{
- regulator-name = "vcama";
- regulator-min-microvolt = <1500000>;
- regulator-max-microvolt = <2800000>;
- regulator-enable-ramp-delay = <216>;
- };
-
- mt6323_vio28_reg: ldo_vio28{
- regulator-name = "vio28";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- regulator-enable-ramp-delay = <216>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- mt6323_vusb_reg: ldo_vusb{
- regulator-name = "vusb";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-enable-ramp-delay = <216>;
- regulator-boot-on;
- };
-
- mt6323_vmc_reg: ldo_vmc{
- regulator-name = "vmc";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-enable-ramp-delay = <36>;
- regulator-boot-on;
- };
-
- mt6323_vmch_reg: ldo_vmch{
- regulator-name = "vmch";
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3300000>;
- regulator-enable-ramp-delay = <36>;
- regulator-boot-on;
- };
-
- mt6323_vemc3v3_reg: ldo_vemc3v3{
- regulator-name = "vemc3v3";
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3300000>;
- regulator-enable-ramp-delay = <36>;
- regulator-boot-on;
- };
-
- mt6323_vgp1_reg: ldo_vgp1{
- regulator-name = "vgp1";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <3300000>;
- regulator-enable-ramp-delay = <216>;
- };
-
- mt6323_vgp2_reg: ldo_vgp2{
- regulator-name = "vgp2";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <3000000>;
- regulator-enable-ramp-delay = <216>;
- };
-
- mt6323_vgp3_reg: ldo_vgp3{
- regulator-name = "vgp3";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1800000>;
- regulator-enable-ramp-delay = <216>;
- };
-
- mt6323_vcn18_reg: ldo_vcn18{
- regulator-name = "vcn18";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-enable-ramp-delay = <216>;
- };
-
- mt6323_vsim1_reg: ldo_vsim1{
- regulator-name = "vsim1";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3000000>;
- regulator-enable-ramp-delay = <216>;
- };
-
- mt6323_vsim2_reg: ldo_vsim2{
- regulator-name = "vsim2";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3000000>;
- regulator-enable-ramp-delay = <216>;
- };
-
- mt6323_vrtc_reg: ldo_vrtc{
- regulator-name = "vrtc";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- mt6323_vcamaf_reg: ldo_vcamaf{
- regulator-name = "vcamaf";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <3300000>;
- regulator-enable-ramp-delay = <216>;
- };
-
- mt6323_vibr_reg: ldo_vibr{
- regulator-name = "vibr";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <3300000>;
- regulator-enable-ramp-delay = <36>;
- };
-
- mt6323_vrf18_reg: ldo_vrf18{
- regulator-name = "vrf18";
- regulator-min-microvolt = <1825000>;
- regulator-max-microvolt = <1825000>;
- regulator-enable-ramp-delay = <187>;
- };
-
- mt6323_vm_reg: ldo_vm{
- regulator-name = "vm";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1800000>;
- regulator-enable-ramp-delay = <216>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- mt6323_vio18_reg: ldo_vio18{
- regulator-name = "vio18";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-enable-ramp-delay = <216>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- mt6323_vcamd_reg: ldo_vcamd{
- regulator-name = "vcamd";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1800000>;
- regulator-enable-ramp-delay = <216>;
- };
-
- mt6323_vcamio_reg: ldo_vcamio{
- regulator-name = "vcamio";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-enable-ramp-delay = <216>;
- };
- };
- };
-};
diff --git a/target/linux/mediatek/files/arch/arm/boot/dts/mt7623-NAND-ePHY.dts b/target/linux/mediatek/files/arch/arm/boot/dts/mt7623-NAND-ePHY.dts
deleted file mode 100644
index bcd2df264d..0000000000
--- a/target/linux/mediatek/files/arch/arm/boot/dts/mt7623-NAND-ePHY.dts
+++ /dev/null
@@ -1,523 +0,0 @@
-/*
- * Copyright (c) 2016 MediaTek Inc.
- * Author: John Crispin <blogic@openwrt.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-/dts-v1/;
-
-#include "_mt7623.dtsi"
-#include <dt-bindings/gpio/gpio.h>
-
-/ {
- model = "MediaTek MT7623 NAND reference board";
- compatible = "mediatek,mt7623-rfb-nand-ephy", "mediatek,mt7623";
-
- chosen {
- stdout-path = &uart2;
- };
-
- memory {
- reg = <0 0x80000000 0 0x20000000>;
- };
-
- usb_p1_vbus: regulator@0 {
- compatible = "regulator-fixed";
- regulator-name = "usb_vbus";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- gpio = <&pio 135 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-};
-
-&cpu0 {
- proc-supply = <&mt6323_vproc_reg>;
-};
-
-&cpu1 {
- proc-supply = <&mt6323_vproc_reg>;
-};
-
-&cpu2 {
- proc-supply = <&mt6323_vproc_reg>;
-};
-
-&cpu3 {
- proc-supply = <&mt6323_vproc_reg>;
-};
-
-&pwrap {
- pmic: mt6323 {
- compatible = "mediatek,mt6323";
- interrupt-parent = <&pio>;
- interrupts = <150 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-controller;
- #interrupt-cells = <2>;
-
- mt6323regulator: mt6323regulator{
- compatible = "mediatek,mt6323-regulator";
-
- mt6323_vproc_reg: buck_vproc{
- regulator-name = "vproc";
- regulator-min-microvolt = < 700000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <12500>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- mt6323_vsys_reg: buck_vsys{
- regulator-name = "vsys";
- regulator-min-microvolt = <1400000>;
- regulator-max-microvolt = <2987500>;
- regulator-ramp-delay = <25000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- mt6323_vpa_reg: buck_vpa{
- regulator-name = "vpa";
- regulator-min-microvolt = < 500000>;
- regulator-max-microvolt = <3650000>;
- };
-
- mt6323_vtcxo_reg: ldo_vtcxo{
- regulator-name = "vtcxo";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- regulator-enable-ramp-delay = <90>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- mt6323_vcn28_reg: ldo_vcn28{
- regulator-name = "vcn28";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- regulator-enable-ramp-delay = <185>;
- };
-
- mt6323_vcn33_bt_reg: ldo_vcn33_bt{
- regulator-name = "vcn33_bt";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3600000>;
- regulator-enable-ramp-delay = <185>;
- };
-
- mt6323_vcn33_wifi_reg: ldo_vcn33_wifi{
- regulator-name = "vcn33_wifi";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3600000>;
- regulator-enable-ramp-delay = <185>;
- };
-
- mt6323_va_reg: ldo_va{
- regulator-name = "va";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- regulator-enable-ramp-delay = <216>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- mt6323_vcama_reg: ldo_vcama{
- regulator-name = "vcama";
- regulator-min-microvolt = <1500000>;
- regulator-max-microvolt = <2800000>;
- regulator-enable-ramp-delay = <216>;
- };
-
- mt6323_vio28_reg: ldo_vio28{
- regulator-name = "vio28";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- regulator-enable-ramp-delay = <216>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- mt6323_vusb_reg: ldo_vusb{
- regulator-name = "vusb";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-enable-ramp-delay = <216>;
- regulator-boot-on;
- };
-
- mt6323_vmc_reg: ldo_vmc{
- regulator-name = "vmc";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-enable-ramp-delay = <36>;
- regulator-boot-on;
- };
-
- mt6323_vmch_reg: ldo_vmch{
- regulator-name = "vmch";
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3300000>;
- regulator-enable-ramp-delay = <36>;
- regulator-boot-on;
- };
-
- mt6323_vemc3v3_reg: ldo_vemc3v3{
- regulator-name = "vemc3v3";
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3300000>;
- regulator-enable-ramp-delay = <36>;
- regulator-boot-on;
- };
-
- mt6323_vgp1_reg: ldo_vgp1{
- regulator-name = "vgp1";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <3300000>;
- regulator-enable-ramp-delay = <216>;
- };
-
- mt6323_vgp2_reg: ldo_vgp2{
- regulator-name = "vgp2";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <3000000>;
- regulator-enable-ramp-delay = <216>;
- };
-
- mt6323_vgp3_reg: ldo_vgp3{
- regulator-name = "vgp3";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1800000>;
- regulator-enable-ramp-delay = <216>;
- };
-
- mt6323_vcn18_reg: ldo_vcn18{
- regulator-name = "vcn18";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-enable-ramp-delay = <216>;
- };
-
- mt6323_vsim1_reg: ldo_vsim1{
- regulator-name = "vsim1";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3000000>;
- regulator-enable-ramp-delay = <216>;
- };
-
- mt6323_vsim2_reg: ldo_vsim2{
- regulator-name = "vsim2";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3000000>;
- regulator-enable-ramp-delay = <216>;
- };
-
- mt6323_vrtc_reg: ldo_vrtc{
- regulator-name = "vrtc";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- mt6323_vcamaf_reg: ldo_vcamaf{
- regulator-name = "vcamaf";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <3300000>;
- regulator-enable-ramp-delay = <216>;
- };
-
- mt6323_vibr_reg: ldo_vibr{
- regulator-name = "vibr";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <3300000>;
- regulator-enable-ramp-delay = <36>;
- };
-
- mt6323_vrf18_reg: ldo_vrf18{
- regulator-name = "vrf18";
- regulator-min-microvolt = <1825000>;
- regulator-max-microvolt = <1825000>;
- regulator-enable-ramp-delay = <187>;
- };
-
- mt6323_vm_reg: ldo_vm{
- regulator-name = "vm";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1800000>;
- regulator-enable-ramp-delay = <216>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- mt6323_vio18_reg: ldo_vio18{
- regulator-name = "vio18";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-enable-ramp-delay = <216>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- mt6323_vcamd_reg: ldo_vcamd{
- regulator-name = "vcamd";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1800000>;
- regulator-enable-ramp-delay = <216>;
- };
-
- mt6323_vcamio_reg: ldo_vcamio{
- regulator-name = "vcamio";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-enable-ramp-delay = <216>;
- };
- };
-
- mt6323led: leds {
- compatible = "mediatek,mt6323-led";
- #address-cells = <1>;
- #size-cells = <0>;
-
- led@0 {
- reg = <0>;
- label = "LED0";
- linux,default-trigger = "timer";
- default-state = "on";
- };
- led@1 {
- reg = <1>;
- label = "LED1";
- default-state = "off";
- };
- led@2 {
- reg = <2>;
- label = "LED2";
- default-state = "on";
- };
- led@3 {
- reg = <3>;
- label = "LED3";
- default-state = "on";
- };
- };
- };
-};
-
-&uart2 {
- status = "okay";
-};
-
-&pio {
- nand_pins_default: nanddefault {
- pins_dat {
- pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_NLD7>,
- <MT7623_PIN_112_MSDC0_DAT6_FUNC_NLD6>,
- <MT7623_PIN_114_MSDC0_DAT4_FUNC_NLD4>,
- <MT7623_PIN_118_MSDC0_DAT3_FUNC_NLD3>,
- <MT7623_PIN_121_MSDC0_DAT0_FUNC_NLD0>,
- <MT7623_PIN_120_MSDC0_DAT1_FUNC_NLD1>,
- <MT7623_PIN_113_MSDC0_DAT5_FUNC_NLD5>,
- <MT7623_PIN_115_MSDC0_RSTB_FUNC_NLD8>,
- <MT7623_PIN_119_MSDC0_DAT2_FUNC_NLD2>;
- input-enable;
- drive-strength = <MTK_DRIVE_8mA>;
- bias-pull-up;
- };
-
- pins_we {
- pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_NWEB>;
- drive-strength = <MTK_DRIVE_8mA>;
- bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
- };
-
- pins_ale {
- pinmux = <MT7623_PIN_116_MSDC0_CMD_FUNC_NALE>;
- drive-strength = <MTK_DRIVE_8mA>;
- bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
- };
- };
-
- eth_default: eth {
- pins_eth {
- pinmux = <MT7623_PIN_275_G2_MDC_FUNC_MDC>,
- <MT7623_PIN_276_G2_MDIO_FUNC_MDIO>,
- <MT7623_PIN_262_G2_TXEN_FUNC_G2_TXEN>,
- <MT7623_PIN_263_G2_TXD3_FUNC_G2_TXD3>,
- <MT7623_PIN_264_G2_TXD2_FUNC_G2_TXD2>,
- <MT7623_PIN_265_G2_TXD1_FUNC_G2_TXD1>,
- <MT7623_PIN_266_G2_TXD0_FUNC_G2_TXD0>,
- <MT7623_PIN_267_G2_TXCLK_FUNC_G2_TXC>,
- <MT7623_PIN_268_G2_RXCLK_FUNC_G2_RXC>,
- <MT7623_PIN_269_G2_RXD0_FUNC_G2_RXD0>,
- <MT7623_PIN_270_G2_RXD1_FUNC_G2_RXD1>,
- <MT7623_PIN_271_G2_RXD2_FUNC_G2_RXD2>,
- <MT7623_PIN_272_G2_RXD3_FUNC_G2_RXD3>,
- <MT7623_PIN_274_G2_RXDV_FUNC_G2_RXDV>;
- };
-
- pins_eth_rst {
- pinmux = <MT7623_PIN_15_GPIO15_FUNC_GPIO15>;
- output-low;
- };
- };
-
- pwm_pins: pwm {
- pins_pwm1 {
- pinmux = <MT7623_PIN_204_PWM1_FUNC_PWM1>;
- };
-
- pins_pwm2 {
- pinmux = <MT7623_PIN_205_PWM2_FUNC_PWM2>;
- };
- };
-};
-
-&nandc {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&nand_pins_default>;
- nand@0 {
- reg = <0>;
- spare_per_sector = <64>;
- nand-ecc-mode = "hw";
- nand-ecc-strength = <12>;
- nand-ecc-step-size = <1024>;
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- partition@C0000 {
- label = "uboot-env";
- reg = <0xC0000 0x40000>;
- };
-
- partition@100000 {
- label = "factory";
- reg = <0x100000 0x40000>;
- };
-
- partition@140000 {
- label = "kernel";
- reg = <0x140000 0x2000000>;
- };
-
- partition@2140000 {
- label = "recovery";
- reg = <0x2140000 0x2000000>;
- };
-
- partition@4140000 {
- label = "ubi";
- reg = <0x4140000 0x1000000>;
- };
- };
- };
-};
-&bch {
- status = "okay";
-};
-
-&usb1 {
- vusb33-supply = <&mt6323_vusb_reg>;
- vbus-supply = <&usb_p1_vbus>;
- status = "okay";
-};
-
-&u3phy1 {
- status = "okay";
-};
-
-&pcie {
- status = "okay";
-};
-
-&eth {
- status = "okay";
-};
-
-&gmac1 {
- mac-address = [00 11 22 33 44 56];
- status = "okay";
-};
-
-&gmac2 {
- mac-address = [00 11 22 33 44 55];
- status = "okay";
-
- phy-handle = <&phy5>;
-};
-
-&mdio0 {
- switch@0 {
- compatible = "mediatek,mt7530";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
-
- pinctrl-names = "default";
- pinctrl-0 = <&eth_default>;
-
- core-supply = <&mt6323_vpa_reg>;
- io-supply = <&mt6323_vemc3v3_reg>;
-
- mediatek,mcm;
- resets = <&ethsys 2>;
- reset-names = "mcm";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
- port@0 {
- reg = <0>;
- label = "lan0";
- };
-
- port@1 {
- reg = <1>;
- label = "lan1";
- };
-
- port@2 {
- reg = <2>;
- label = "lan2";
- };
-
- port@3 {
- reg = <3>;
- label = "lan3";
- };
-
- port@6 {
- reg = <6>;
- label = "cpu";
- ethernet = <&gmac1>;
- phy-mode = "trgmii";
- fixed-link {
- speed = <1000>;
- full-duplex;
- };
- };
- };
- };
-
- phy5: ethernet-phy@5 {
- reg = <5>;
- phy-mode = "rgmii-rxid";
- };
-};
-
-&pwm {
- pinctrl-names = "default";
- pinctrl-0 = <&pwm_pins>;
- status = "okay";
-};
diff --git a/target/linux/mediatek/files/arch/arm/boot/dts/mt7623-NAND.dts b/target/linux/mediatek/files/arch/arm/boot/dts/mt7623-NAND.dts
deleted file mode 100644
index d9f08d015d..0000000000
--- a/target/linux/mediatek/files/arch/arm/boot/dts/mt7623-NAND.dts
+++ /dev/null
@@ -1,553 +0,0 @@
-/*
- * Copyright (c) 2016 MediaTek Inc.
- * Author: John Crispin <blogic@openwrt.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-/dts-v1/;
-
-#include "_mt7623.dtsi"
-#include <dt-bindings/gpio/gpio.h>
-
-/ {
- model = "MediaTek MT7623 NAND reference board";
- compatible = "mediatek,mt7623-rfb-nand", "mediatek,mt7623";
-
- chosen {
- stdout-path = &uart2;
- };
-
- memory {
- reg = <0 0x80000000 0 0x20000000>;
- };
-
- usb_p1_vbus: regulator@0 {
- compatible = "regulator-fixed";
- regulator-name = "usb_vbus";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- gpio = <&pio 135 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-};
-
-&cpu0 {
- proc-supply = <&mt6323_vproc_reg>;
-};
-
-&cpu1 {
- proc-supply = <&mt6323_vproc_reg>;
-};
-
-&cpu2 {
- proc-supply = <&mt6323_vproc_reg>;
-};
-
-&cpu3 {
- proc-supply = <&mt6323_vproc_reg>;
-};
-
-&pwrap {
- pmic: mt6323 {
- compatible = "mediatek,mt6323";
- interrupt-parent = <&pio>;
- interrupts = <150 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-controller;
- #interrupt-cells = <2>;
-
- mt6323regulator: mt6323regulator{
- compatible = "mediatek,mt6323-regulator";
-
- mt6323_vproc_reg: buck_vproc{
- regulator-name = "vproc";
- regulator-min-microvolt = < 700000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <12500>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- mt6323_vsys_reg: buck_vsys{
- regulator-name = "vsys";
- regulator-min-microvolt = <1400000>;
- regulator-max-microvolt = <2987500>;
- regulator-ramp-delay = <25000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- mt6323_vpa_reg: buck_vpa{
- regulator-name = "vpa";
- regulator-min-microvolt = < 500000>;
- regulator-max-microvolt = <3650000>;
- };
-
- mt6323_vtcxo_reg: ldo_vtcxo{
- regulator-name = "vtcxo";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- regulator-enable-ramp-delay = <90>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- mt6323_vcn28_reg: ldo_vcn28{
- regulator-name = "vcn28";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- regulator-enable-ramp-delay = <185>;
- };
-
- mt6323_vcn33_bt_reg: ldo_vcn33_bt{
- regulator-name = "vcn33_bt";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3600000>;
- regulator-enable-ramp-delay = <185>;
- };
-
- mt6323_vcn33_wifi_reg: ldo_vcn33_wifi{
- regulator-name = "vcn33_wifi";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3600000>;
- regulator-enable-ramp-delay = <185>;
- };
-
- mt6323_va_reg: ldo_va{
- regulator-name = "va";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- regulator-enable-ramp-delay = <216>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- mt6323_vcama_reg: ldo_vcama{
- regulator-name = "vcama";
- regulator-min-microvolt = <1500000>;
- regulator-max-microvolt = <2800000>;
- regulator-enable-ramp-delay = <216>;
- };
-
- mt6323_vio28_reg: ldo_vio28{
- regulator-name = "vio28";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- regulator-enable-ramp-delay = <216>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- mt6323_vusb_reg: ldo_vusb{
- regulator-name = "vusb";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-enable-ramp-delay = <216>;
- regulator-boot-on;
- };
-
- mt6323_vmc_reg: ldo_vmc{
- regulator-name = "vmc";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-enable-ramp-delay = <36>;
- regulator-boot-on;
- };
-
- mt6323_vmch_reg: ldo_vmch{
- regulator-name = "vmch";
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3300000>;
- regulator-enable-ramp-delay = <36>;
- regulator-boot-on;
- };
-
- mt6323_vemc3v3_reg: ldo_vemc3v3{
- regulator-name = "vemc3v3";
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3300000>;
- regulator-enable-ramp-delay = <36>;
- regulator-boot-on;
- };
-
- mt6323_vgp1_reg: ldo_vgp1{
- regulator-name = "vgp1";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <3300000>;
- regulator-enable-ramp-delay = <216>;
- };
-
- mt6323_vgp2_reg: ldo_vgp2{
- regulator-name = "vgp2";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <3000000>;
- regulator-enable-ramp-delay = <216>;
- };
-
- mt6323_vgp3_reg: ldo_vgp3{
- regulator-name = "vgp3";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1800000>;
- regulator-enable-ramp-delay = <216>;
- };
-
- mt6323_vcn18_reg: ldo_vcn18{
- regulator-name = "vcn18";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-enable-ramp-delay = <216>;
- };
-
- mt6323_vsim1_reg: ldo_vsim1{
- regulator-name = "vsim1";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3000000>;
- regulator-enable-ramp-delay = <216>;
- };
-
- mt6323_vsim2_reg: ldo_vsim2{
- regulator-name = "vsim2";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3000000>;
- regulator-enable-ramp-delay = <216>;
- };
-
- mt6323_vrtc_reg: ldo_vrtc{
- regulator-name = "vrtc";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- mt6323_vcamaf_reg: ldo_vcamaf{
- regulator-name = "vcamaf";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <3300000>;
- regulator-enable-ramp-delay = <216>;
- };
-
- mt6323_vibr_reg: ldo_vibr{
- regulator-name = "vibr";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <3300000>;
- regulator-enable-ramp-delay = <36>;
- };
-
- mt6323_vrf18_reg: ldo_vrf18{
- regulator-name = "vrf18";
- regulator-min-microvolt = <1825000>;
- regulator-max-microvolt = <1825000>;
- regulator-enable-ramp-delay = <187>;
- };
-
- mt6323_vm_reg: ldo_vm{
- regulator-name = "vm";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1800000>;
- regulator-enable-ramp-delay = <216>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- mt6323_vio18_reg: ldo_vio18{
- regulator-name = "vio18";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-enable-ramp-delay = <216>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- mt6323_vcamd_reg: ldo_vcamd{
- regulator-name = "vcamd";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1800000>;
- regulator-enable-ramp-delay = <216>;
- };
-
- mt6323_vcamio_reg: ldo_vcamio{
- regulator-name = "vcamio";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-enable-ramp-delay = <216>;
- };
- };
-
- mt6323led: leds {
- compatible = "mediatek,mt6323-led";
- #address-cells = <1>;
- #size-cells = <0>;
-
- led@0 {
- reg = <0>;
- label = "LED0";
- linux,default-trigger = "timer";
- default-state = "on";
- };
- led@1 {
- reg = <1>;
- label = "LED1";
- default-state = "off";
- };
- led@2 {
- reg = <2>;
- label = "LED2";
- default-state = "on";
- };
- led@3 {
- reg = <3>;
- label = "LED3";
- default-state = "on";
- };
- };
- };
-};
-
-&uart2 {
- status = "okay";
-};
-
-&pio {
- nand_pins_default: nanddefault {
- pins_dat {
- pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_NLD7>,
- <MT7623_PIN_112_MSDC0_DAT6_FUNC_NLD6>,
- <MT7623_PIN_114_MSDC0_DAT4_FUNC_NLD4>,
- <MT7623_PIN_118_MSDC0_DAT3_FUNC_NLD3>,
- <MT7623_PIN_121_MSDC0_DAT0_FUNC_NLD0>,
- <MT7623_PIN_120_MSDC0_DAT1_FUNC_NLD1>,
- <MT7623_PIN_113_MSDC0_DAT5_FUNC_NLD5>,
- <MT7623_PIN_115_MSDC0_RSTB_FUNC_NLD8>,
- <MT7623_PIN_119_MSDC0_DAT2_FUNC_NLD2>;
- input-enable;
- drive-strength = <MTK_DRIVE_8mA>;
- bias-pull-up;
- };
-
- pins_we {
- pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_NWEB>;
- drive-strength = <MTK_DRIVE_8mA>;
- bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
- };
-
- pins_ale {
- pinmux = <MT7623_PIN_116_MSDC0_CMD_FUNC_NALE>;
- drive-strength = <MTK_DRIVE_8mA>;
- bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
- };
- };
-
- eth_default: eth {
- pins_eth {
- pinmux = <MT7623_PIN_275_G2_MDC_FUNC_MDC>,
- <MT7623_PIN_276_G2_MDIO_FUNC_MDIO>,
- <MT7623_PIN_262_G2_TXEN_FUNC_G2_TXEN>,
- <MT7623_PIN_263_G2_TXD3_FUNC_G2_TXD3>,
- <MT7623_PIN_264_G2_TXD2_FUNC_G2_TXD2>,
- <MT7623_PIN_265_G2_TXD1_FUNC_G2_TXD1>,
- <MT7623_PIN_266_G2_TXD0_FUNC_G2_TXD0>,
- <MT7623_PIN_267_G2_TXCLK_FUNC_G2_TXC>,
- <MT7623_PIN_268_G2_RXCLK_FUNC_G2_RXC>,
- <MT7623_PIN_269_G2_RXD0_FUNC_G2_RXD0>,
- <MT7623_PIN_270_G2_RXD1_FUNC_G2_RXD1>,
- <MT7623_PIN_271_G2_RXD2_FUNC_G2_RXD2>,
- <MT7623_PIN_272_G2_RXD3_FUNC_G2_RXD3>,
- <MT7623_PIN_274_G2_RXDV_FUNC_G2_RXDV>;
- };
-
- pins_eth_rst {
- pinmux = <MT7623_PIN_15_GPIO15_FUNC_GPIO15>;
- output-low;
- };
- };
-
- pwm_pins: pwm {
- pins_pwm1 {
- pinmux = <MT7623_PIN_204_PWM1_FUNC_PWM1>;
- };
-
- pins_pwm2 {
- pinmux = <MT7623_PIN_205_PWM2_FUNC_PWM2>;
- };
- };
-};
-
-&nandc {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&nand_pins_default>;
- nand@0 {
- reg = <0>;
- spare_per_sector = <64>;
- nand-ecc-mode = "hw";
- nand-ecc-strength = <12>;
- nand-ecc-step-size = <1024>;
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- partition@C0000 {
- label = "uboot-env";
- reg = <0xC0000 0x40000>;
- };
-
- partition@100000 {
- label = "factory";
- reg = <0x100000 0x40000>;
- };
-
- partition@140000 {
- label = "kernel";
- reg = <0x140000 0x2000000>;
- };
-
- partition@2140000 {
- label = "recovery";
- reg = <0x2140000 0x2000000>;
- };
-
- partition@4140000 {
- label = "ubi";
- reg = <0x4140000 0x1000000>;
- };
- };
- };
-};
-&bch {
- status = "okay";
-};
-
-&usb1 {
- vusb33-supply = <&mt6323_vusb_reg>;
- vbus-supply = <&usb_p1_vbus>;
- status = "okay";
-};
-
-&u3phy1 {
- status = "okay";
-};
-
-&pcie {
- status = "okay";
-};
-
-&eth {
- status = "okay";
-};
-
-&gmac1 {
- mac-address = [00 11 22 33 44 56];
- status = "okay";
-
- phy-mode = "trgmii";
-
- fixed-link {
- speed = <1000>;
- full-duplex;
- pause;
- };
-};
-
-&gmac2 {
- mac-address = [00 11 22 33 44 55];
- status = "okay";
-
- phy-mode = "trgmii";
-
- fixed-link {
- speed = <1000>;
- full-duplex;
- pause;
- };
-};
-
-&mdio0 {
- switch@0 {
- compatible = "mediatek,mt7530";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
-
- pinctrl-names = "default";
- pinctrl-0 = <&eth_default>;
-
- core-supply = <&mt6323_vpa_reg>;
- io-supply = <&mt6323_vemc3v3_reg>;
-
- mediatek,mcm;
- resets = <&ethsys 2>;
- reset-names = "mcm";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
- port@0 {
- reg = <0>;
- label = "lan0";
- cpu = <&cpu_port0>;
- };
-
- port@1 {
- reg = <1>;
- label = "lan1";
- cpu = <&cpu_port0>;
- };
-
- port@2 {
- reg = <2>;
- label = "lan2";
- cpu = <&cpu_port0>;
- };
-
- port@3 {
- reg = <3>;
- label = "lan3";
- cpu = <&cpu_port0>;
- };
-
- port@4 {
- reg = <4>;
- label = "wan";
- cpu = <&cpu_port1>;
- };
-
- cpu_port1: port@5 {
- reg = <5>;
- label = "cpu";
- ethernet = <&gmac2>;
- phy-mode = "trgmii";
- fixed-link {
- speed = <1000>;
- full-duplex;
- };
- };
-
- cpu_port0: port@6 {
- reg = <6>;
- label = "cpu";
- ethernet = <&gmac1>;
- phy-mode = "trgmii";
- fixed-link {
- speed = <1000>;
- full-duplex;
- };
- };
- };
- };
-};
-
-&pwm {
- pinctrl-names = "default";
- pinctrl-0 = <&pwm_pins>;
- status = "okay";
-};
diff --git a/target/linux/mediatek/files/arch/arm/boot/dts/mt7623-eMMC.dts b/target/linux/mediatek/files/arch/arm/boot/dts/mt7623-eMMC.dts
deleted file mode 100644
index 6f45ff6863..0000000000
--- a/target/linux/mediatek/files/arch/arm/boot/dts/mt7623-eMMC.dts
+++ /dev/null
@@ -1,547 +0,0 @@
-/*
- * Copyright (c) 2016 MediaTek Inc.
- * Author: John Crispin <blogic@openwrt.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-/dts-v1/;
-
-#include "_mt7623.dtsi"
-#include <dt-bindings/gpio/gpio.h>
-
-/ {
- model = "MediaTek MT7623 eMMC reference board";
- compatible = "mediatek,mt7623-rfb-emmc", "mediatek,mt7623";
-
- chosen {
- stdout-path = &uart2;
- bootargs = "earlyprintk block2mtd.block2mtd=/dev/mmcblk0,65536,eMMC,5 mtdparts=eMMC:256k(mbr)ro,512k(uboot)ro,256k(config)ro,256k(factory)ro,32M(kernel),32M(recovery),1024M(rootfs),2048M(usrdata),-(bmtpool) rootfstype=squashfs,jffs2";
- };
-
- memory {
- reg = <0 0x80000000 0 0x20000000>;
- };
-
- usb_p1_vbus: regulator@0 {
- compatible = "regulator-fixed";
- regulator-name = "usb_vbus";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- gpio = <&pio 135 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- switch {
- compatible = "mediatek,mt7530";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
-
- dsa,mii-bus = <&mdio0>;
-
- pinctrl-names = "default";
- pinctrl-0 = <&eth_default>;
-
- core-supply = <&mt6323_vpa_reg>;
- io-supply = <&mt6323_vemc3v3_reg>;
-
- mediatek,mcm;
- resets = <&ethsys 2>;
- reset-names = "mcm";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
- port@0 {
- reg = <0>;
- label = "lan0";
- };
-
- port@1 {
- reg = <1>;
- label = "lan1";
- };
-
- port@2 {
- reg = <2>;
- label = "lan2";
- };
-
- port@3 {
- reg = <3>;
- label = "lan3";
- };
-
- port@6 {
- reg = <6>;
- label = "cpu";
- ethernet = <&gmac1>;
- phy-mode = "trgmii";
- fixed-link {
- speed = <1000>;
- full-duplex;
- };
- };
- };
- };
-};
-
-&cpu0 {
- proc-supply = <&mt6323_vproc_reg>;
-};
-
-&cpu1 {
- proc-supply = <&mt6323_vproc_reg>;
-};
-
-&cpu2 {
- proc-supply = <&mt6323_vproc_reg>;
-};
-
-&cpu3 {
- proc-supply = <&mt6323_vproc_reg>;
-};
-
-&pwrap {
- pmic: mt6323 {
- compatible = "mediatek,mt6323";
- interrupt-parent = <&pio>;
- interrupts = <150 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-controller;
- #interrupt-cells = <2>;
-
- mt6323regulator: mt6323regulator{
- compatible = "mediatek,mt6323-regulator";
-
- mt6323_vproc_reg: buck_vproc{
- regulator-name = "vproc";
- regulator-min-microvolt = < 700000>;
- regulator-max-microvolt = <1350000>;
- regulator-ramp-delay = <12500>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- mt6323_vsys_reg: buck_vsys{
- regulator-name = "vsys";
- regulator-min-microvolt = <1400000>;
- regulator-max-microvolt = <2987500>;
- regulator-ramp-delay = <25000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- mt6323_vpa_reg: buck_vpa{
- regulator-name = "vpa";
- regulator-min-microvolt = < 500000>;
- regulator-max-microvolt = <3650000>;
- };
-
- mt6323_vtcxo_reg: ldo_vtcxo{
- regulator-name = "vtcxo";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- regulator-enable-ramp-delay = <90>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- mt6323_vcn28_reg: ldo_vcn28{
- regulator-name = "vcn28";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- regulator-enable-ramp-delay = <185>;
- };
-
- mt6323_vcn33_bt_reg: ldo_vcn33_bt{
- regulator-name = "vcn33_bt";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3600000>;
- regulator-enable-ramp-delay = <185>;
- };
-
- mt6323_vcn33_wifi_reg: ldo_vcn33_wifi{
- regulator-name = "vcn33_wifi";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3600000>;
- regulator-enable-ramp-delay = <185>;
- };
-
- mt6323_va_reg: ldo_va{
- regulator-name = "va";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- regulator-enable-ramp-delay = <216>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- mt6323_vcama_reg: ldo_vcama{
- regulator-name = "vcama";
- regulator-min-microvolt = <1500000>;
- regulator-max-microvolt = <2800000>;
- regulator-enable-ramp-delay = <216>;
- };
-
- mt6323_vio28_reg: ldo_vio28{
- regulator-name = "vio28";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- regulator-enable-ramp-delay = <216>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- mt6323_vusb_reg: ldo_vusb{
- regulator-name = "vusb";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-enable-ramp-delay = <216>;
- regulator-boot-on;
- };
-
- mt6323_vmc_reg: ldo_vmc{
- regulator-name = "vmc";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-enable-ramp-delay = <36>;
- regulator-boot-on;
- };
-
- mt6323_vmch_reg: ldo_vmch{
- regulator-name = "vmch";
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3300000>;
- regulator-enable-ramp-delay = <36>;
- regulator-boot-on;
- };
-
- mt6323_vemc3v3_reg: ldo_vemc3v3{
- regulator-name = "vemc3v3";
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3300000>;
- regulator-enable-ramp-delay = <36>;
- regulator-boot-on;
- };
-
- mt6323_vgp1_reg: ldo_vgp1{
- regulator-name = "vgp1";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <3300000>;
- regulator-enable-ramp-delay = <216>;
- };
-
- mt6323_vgp2_reg: ldo_vgp2{
- regulator-name = "vgp2";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <3000000>;
- regulator-enable-ramp-delay = <216>;
- };
-
- mt6323_vgp3_reg: ldo_vgp3{
- regulator-name = "vgp3";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1800000>;
- regulator-enable-ramp-delay = <216>;
- };
-
- mt6323_vcn18_reg: ldo_vcn18{
- regulator-name = "vcn18";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-enable-ramp-delay = <216>;
- };
-
- mt6323_vsim1_reg: ldo_vsim1{
- regulator-name = "vsim1";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3000000>;
- regulator-enable-ramp-delay = <216>;
- };
-
- mt6323_vsim2_reg: ldo_vsim2{
- regulator-name = "vsim2";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3000000>;
- regulator-enable-ramp-delay = <216>;
- };
-
- mt6323_vrtc_reg: ldo_vrtc{
- regulator-name = "vrtc";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- mt6323_vcamaf_reg: ldo_vcamaf{
- regulator-name = "vcamaf";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <3300000>;
- regulator-enable-ramp-delay = <216>;
- };
-
- mt6323_vibr_reg: ldo_vibr{
- regulator-name = "vibr";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <3300000>;
- regulator-enable-ramp-delay = <36>;
- };
-
- mt6323_vrf18_reg: ldo_vrf18{
- regulator-name = "vrf18";
- regulator-min-microvolt = <1825000>;
- regulator-max-microvolt = <1825000>;
- regulator-enable-ramp-delay = <187>;
- };
-
- mt6323_vm_reg: ldo_vm{
- regulator-name = "vm";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1800000>;
- regulator-enable-ramp-delay = <216>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- mt6323_vio18_reg: ldo_vio18{
- regulator-name = "vio18";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-enable-ramp-delay = <216>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- mt6323_vcamd_reg: ldo_vcamd{
- regulator-name = "vcamd";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1800000>;
- regulator-enable-ramp-delay = <216>;
- };
-
- mt6323_vcamio_reg: ldo_vcamio{
- regulator-name = "vcamio";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-enable-ramp-delay = <216>;
- };
- };
- };
-};
-
-&uart2 {
- status = "okay";
-};
-
-&mmc0 {
- status = "okay";
- pinctrl-names = "default", "state_uhs";
- pinctrl-0 = <&mmc0_pins_default>;
- pinctrl-1 = <&mmc0_pins_uhs>;
- bus-width = <8>;
- max-frequency = <50000000>;
- cap-mmc-highspeed;
- vmmc-supply = <&mt6323_vemc3v3_reg>;
- vqmmc-supply = <&mt6323_vio18_reg>;
- non-removable;
-};
-
-&mmc1 {
- status = "okay";
- pinctrl-names = "default", "state_uhs";
- pinctrl-0 = <&mmc1_pins_default>;
- pinctrl-1 = <&mmc1_pins_uhs>;
- bus-width = <4>;
- max-frequency = <50000000>;
- cap-sd-highspeed;
- sd-uhs-sdr25;
-// cd-gpios = <&pio 132 0>;
- vmmc-supply = <&mt6323_vmch_reg>;
- vqmmc-supply = <&mt6323_vmc_reg>;
-};
-
-&pio {
- mmc0_pins_default: mmc0default {
- pins_cmd_dat {
- pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
- <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
- <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
- <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
- <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
- <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
- <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
- <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
- <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
- input-enable;
- bias-pull-up;
- };
-
- pins_clk {
- pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
- bias-pull-down;
- };
-
- pins_rst {
- pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
- bias-pull-up;
- };
- };
-
- mmc0_pins_uhs: mmc0 {
- pins_cmd_dat {
- pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
- <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
- <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
- <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
- <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
- <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
- <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
- <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
- <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
- input-enable;
- drive-strength = <MTK_DRIVE_2mA>;
- bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
- };
-
- pins_clk {
- pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
- drive-strength = <MTK_DRIVE_2mA>;
- bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
- };
-
- pins_rst {
- pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
- bias-pull-up;
- };
- };
-
- mmc1_pins_default: mmc1default {
- pins_cmd_dat {
- pinmux = <MT7623_PIN_107_MSDC1_DAT0_FUNC_MSDC1_DAT0>,
- <MT7623_PIN_108_MSDC1_DAT1_FUNC_MSDC1_DAT1>,
- <MT7623_PIN_109_MSDC1_DAT2_FUNC_MSDC1_DAT2>,
- <MT7623_PIN_110_MSDC1_DAT3_FUNC_MSDC1_DAT3>,
- <MT7623_PIN_105_MSDC1_CMD_FUNC_MSDC1_CMD>;
- input-enable;
- drive-strength = <MTK_DRIVE_4mA>;
- bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
- };
-
- pins_clk {
- pinmux = <MT7623_PIN_106_MSDC1_CLK_FUNC_MSDC1_CLK>;
- bias-pull-down;
- drive-strength = <MTK_DRIVE_4mA>;
- };
-
-// pins_insert {
-// pinmux = <MT8173_PIN_132_I2S0_DATA1_FUNC_GPIO132>;
-// bias-pull-up;
-// };
- };
-
- mmc1_pins_uhs: mmc1 {
- pins_cmd_dat {
- pinmux = <MT7623_PIN_107_MSDC1_DAT0_FUNC_MSDC1_DAT0>,
- <MT7623_PIN_108_MSDC1_DAT1_FUNC_MSDC1_DAT1>,
- <MT7623_PIN_109_MSDC1_DAT2_FUNC_MSDC1_DAT2>,
- <MT7623_PIN_110_MSDC1_DAT3_FUNC_MSDC1_DAT3>,
- <MT7623_PIN_105_MSDC1_CMD_FUNC_MSDC1_CMD>;
- input-enable;
- drive-strength = <MTK_DRIVE_4mA>;
- bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
- };
-
- pins_clk {
- pinmux = <MT7623_PIN_106_MSDC1_CLK_FUNC_MSDC1_CLK>;
- drive-strength = <MTK_DRIVE_4mA>;
- bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
- };
- };
-
- eth_default: eth {
- pins_eth {
- pinmux = <MT7623_PIN_275_G2_MDC_FUNC_MDC>,
- <MT7623_PIN_276_G2_MDIO_FUNC_MDIO>,
- <MT7623_PIN_262_G2_TXEN_FUNC_G2_TXEN>,
- <MT7623_PIN_263_G2_TXD3_FUNC_G2_TXD3>,
- <MT7623_PIN_264_G2_TXD2_FUNC_G2_TXD2>,
- <MT7623_PIN_265_G2_TXD1_FUNC_G2_TXD1>,
- <MT7623_PIN_266_G2_TXD0_FUNC_G2_TXD0>,
- <MT7623_PIN_267_G2_TXCLK_FUNC_G2_TXC>,
- <MT7623_PIN_268_G2_RXCLK_FUNC_G2_RXC>,
- <MT7623_PIN_269_G2_RXD0_FUNC_G2_RXD0>,
- <MT7623_PIN_270_G2_RXD1_FUNC_G2_RXD1>,
- <MT7623_PIN_271_G2_RXD2_FUNC_G2_RXD2>,
- <MT7623_PIN_272_G2_RXD3_FUNC_G2_RXD3>,
- <MT7623_PIN_274_G2_RXDV_FUNC_G2_RXDV>;
- };
-
- pins_eth_rst {
- pinmux = <MT7623_PIN_15_GPIO15_FUNC_GPIO15>;
- output-low;
- };
- };
-
- pwm_pins: pwm {
- pins_pwm1 {
- pinmux = <MT7623_PIN_204_PWM1_FUNC_PWM1>;
- };
-
- pins_pwm2 {
- pinmux = <MT7623_PIN_205_PWM2_FUNC_PWM2>;
- };
- };
-};
-
-&usb1 {
- vusb33-supply = <&mt6323_vusb_reg>;
- vbus-supply = <&usb_p1_vbus>;
- status = "okay";
-};
-
-&u3phy1 {
- status = "okay";
-};
-
-&pcie {
- status = "okay";
-};
-
-&eth {
- status = "okay";
-};
-
-&gmac1 {
- mac-address = [00 11 22 33 44 56];
- status = "okay";
-};
-
-&gmac2 {
- mac-address = [00 11 22 33 44 55];
- status = "okay";
-
- phy-handle = <&phy5>;
-};
-
-&mdio0 {
- phy5: ethernet-phy@5 {
- reg = <5>;
- phy-mode = "rgmii-rxid";
- };
-};
-
-&pwm {
- pinctrl-names = "default";
- pinctrl-0 = <&pwm_pins>;
- status = "okay";
-};
diff --git a/target/linux/mediatek/files/arch/arm/boot/dts/mt7623-evb.dts b/target/linux/mediatek/files/arch/arm/boot/dts/mt7623-evb.dts
deleted file mode 100644
index ad2a38bd0a..0000000000
--- a/target/linux/mediatek/files/arch/arm/boot/dts/mt7623-evb.dts
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- * Copyright (c) 2016 MediaTek Inc.
- * Author: John Crispin <blogic@openwrt.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-/dts-v1/;
-#include "mt7623.dtsi"
-
-/ {
- model = "MediaTek MT7623 evaluation board";
- compatible = "mediatek,mt7623-evb", "mediatek,mt7623";
-
- chosen {
- stdout-path = &uart2;
- };
-
- memory {
- reg = <0 0x80000000 0 0x40000000>;
- };
-/*
- pwm_pins: pwm {
- pins_pwm1 {
- pinmux = <MT7623_PIN_204_PWM1_FUNC_PWM1>;
- };
-
- pins_pwm2 {
- pinmux = <MT7623_PIN_205_PWM2_FUNC_PWM2>;
- };
- };*/
-
-};
-
-&uart2 {
- status = "okay";
-};
-
-/*&pwm {
- pinctrl-names = "default";
- pinctrl-0 = <&pwm_pins>;
- status = "okay";
-};*/
diff --git a/target/linux/mediatek/files/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts b/target/linux/mediatek/files/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
deleted file mode 100644
index a66956e26c..0000000000
--- a/target/linux/mediatek/files/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
+++ /dev/null
@@ -1,443 +0,0 @@
-/*
- * Copyright 2017 Sean Wang <sean.wang@mediatek.com>
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
- */
-
-/dts-v1/;
-#include <dt-bindings/input/input.h>
-#include "_mt7623.dtsi"
-#include "mt6323.dtsi"
-
-/ {
- model = "Bananapi BPI-R2";
- compatible = "bananapi,bpi-r2", "mediatek,mt7623";
-
- aliases {
- serial2 = &uart2;
- };
-
- chosen {
- stdout-path = "serial2:115200n8";
- };
-
- cpus {
- cpu@0 {
- proc-supply = <&mt6323_vproc_reg>;
- };
-
- cpu@1 {
- proc-supply = <&mt6323_vproc_reg>;
- };
-
- cpu@2 {
- proc-supply = <&mt6323_vproc_reg>;
- };
-
- cpu@3 {
- proc-supply = <&mt6323_vproc_reg>;
- };
- };
-
- gpio_keys {
- compatible = "gpio-keys";
- pinctrl-names = "default";
- pinctrl-0 = <&key_pins_a>;
-
- factory {
- label = "factory";
- linux,code = <BTN_0>;
- gpios = <&pio 256 GPIO_ACTIVE_LOW>;
- };
-
- wps {
- label = "wps";
- linux,code = <KEY_WPS_BUTTON>;
- gpios = <&pio 257 GPIO_ACTIVE_HIGH>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&led_pins_a>;
-
- red {
- label = "bpi-r2:pio:red";
- gpios = <&pio 239 GPIO_ACTIVE_HIGH>;
- default-state = "off";
- };
-
- green {
- label = "bpi-r2:pio:green";
- gpios = <&pio 240 GPIO_ACTIVE_HIGH>;
- default-state = "off";
- };
-
- blue {
- label = "bpi-r2:pio:blue";
- gpios = <&pio 241 GPIO_ACTIVE_HIGH>;
- default-state = "off";
- };
- };
-
- memory@80000000 {
- reg = <0 0x80000000 0 0x40000000>;
- };
-};
-
-&cir {
- pinctrl-names = "default";
- pinctrl-0 = <&cir_pins_a>;
- status = "okay";
-};
-
-&crypto {
- status = "okay";
-};
-
-&eth {
- status = "okay";
- gmac0: mac@0 {
- compatible = "mediatek,eth-mac";
- reg = <0>;
- phy-mode = "trgmii";
- fixed-link {
- speed = <1000>;
- full-duplex;
- pause;
- };
- };
-
- mdio: mdio-bus {
- #address-cells = <1>;
- #size-cells = <0>;
- switch@0 {
- compatible = "mediatek,mt7530";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
-
- pinctrl-names = "default";
- reset-gpios = <&pio 33 0>;
- core-supply = <&mt6323_vpa_reg>;
- io-supply = <&mt6323_vemc3v3_reg>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
- port@0 {
- reg = <0>;
- label = "wan";
- };
-
- port@1 {
- reg = <1>;
- label = "lan0";
- };
-
- port@2 {
- reg = <2>;
- label = "lan1";
- };
-
- port@3 {
- reg = <3>;
- label = "lan2";
- };
-
- port@4 {
- reg = <4>;
- label = "lan3";
- };
-
- port@6 {
- reg = <6>;
- label = "cpu";
- ethernet = <&gmac0>;
- phy-mode = "trgmii";
- fixed-link {
- speed = <1000>;
- full-duplex;
- };
- };
- };
- };
- };
-};
-
-&i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0_pins_a>;
- status = "okay";
-};
-
-&i2c1 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c1_pins_a>;
- status = "okay";
-};
-
-&pio {
- cir_pins_a:cir@0 {
- pins_cir {
- pinmux = <MT7623_PIN_46_IR_FUNC_IR>;
- bias-disable;
- };
- };
-
- i2c0_pins_a: i2c@0 {
- pins_i2c0 {
- pinmux = <MT7623_PIN_75_SDA0_FUNC_SDA0>,
- <MT7623_PIN_76_SCL0_FUNC_SCL0>;
- bias-disable;
- };
- };
-
- i2c1_pins_a: i2c@1 {
- pin_i2c1 {
- pinmux = <MT7623_PIN_57_SDA1_FUNC_SDA1>,
- <MT7623_PIN_58_SCL1_FUNC_SCL1>;
- bias-disable;
- };
- };
-
- i2s0_pins_a: i2s@0 {
- pin_i2s0 {
- pinmux = <MT7623_PIN_49_I2S0_DATA_FUNC_I2S0_DATA>,
- <MT7623_PIN_72_I2S0_DATA_IN_FUNC_I2S0_DATA_IN>,
- <MT7623_PIN_73_I2S0_LRCK_FUNC_I2S0_LRCK>,
- <MT7623_PIN_74_I2S0_BCK_FUNC_I2S0_BCK>,
- <MT7623_PIN_126_I2S0_MCLK_FUNC_I2S0_MCLK>;
- drive-strength = <MTK_DRIVE_12mA>;
- bias-pull-down;
- };
- };
-
- i2s1_pins_a: i2s@1 {
- pin_i2s1 {
- pinmux = <MT7623_PIN_33_I2S1_DATA_FUNC_I2S1_DATA>,
- <MT7623_PIN_34_I2S1_DATA_IN_FUNC_I2S1_DATA_IN>,
- <MT7623_PIN_35_I2S1_BCK_FUNC_I2S1_BCK>,
- <MT7623_PIN_36_I2S1_LRCK_FUNC_I2S1_LRCK>,
- <MT7623_PIN_37_I2S1_MCLK_FUNC_I2S1_MCLK>;
- drive-strength = <MTK_DRIVE_12mA>;
- bias-pull-down;
- };
- };
-
- key_pins_a: keys@0 {
- pins_keys {
- pinmux = <MT7623_PIN_256_GPIO256_FUNC_GPIO256>,
- <MT7623_PIN_257_GPIO257_FUNC_GPIO257> ;
- input-enable;
- };
- };
-
- led_pins_a: leds@0 {
- pins_leds {
- pinmux = <MT7623_PIN_239_EXT_SDIO0_FUNC_GPIO239>,
- <MT7623_PIN_240_EXT_XCS_FUNC_GPIO240>,
- <MT7623_PIN_241_EXT_SCK_FUNC_GPIO241>;
- };
- };
-
- mmc0_pins_default: mmc0default {
- pins_cmd_dat {
- pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
- <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
- <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
- <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
- <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
- <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
- <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
- <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
- <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
- input-enable;
- bias-pull-up;
- };
-
- pins_clk {
- pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
- bias-pull-down;
- };
-
- pins_rst {
- pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
- bias-pull-up;
- };
- };
-
- mmc0_pins_uhs: mmc0 {
- pins_cmd_dat {
- pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
- <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
- <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
- <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
- <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
- <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
- <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
- <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
- <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
- input-enable;
- drive-strength = <MTK_DRIVE_2mA>;
- bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
- };
-
- pins_clk {
- pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
- drive-strength = <MTK_DRIVE_2mA>;
- bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
- };
-
- pins_rst {
- pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
- bias-pull-up;
- };
- };
-
- mmc1_pins_default: mmc1default {
- pins_cmd_dat {
- pinmux = <MT7623_PIN_107_MSDC1_DAT0_FUNC_MSDC1_DAT0>,
- <MT7623_PIN_108_MSDC1_DAT1_FUNC_MSDC1_DAT1>,
- <MT7623_PIN_109_MSDC1_DAT2_FUNC_MSDC1_DAT2>,
- <MT7623_PIN_110_MSDC1_DAT3_FUNC_MSDC1_DAT3>,
- <MT7623_PIN_105_MSDC1_CMD_FUNC_MSDC1_CMD>;
- input-enable;
- drive-strength = <MTK_DRIVE_4mA>;
- bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
- };
-
- pins_clk {
- pinmux = <MT7623_PIN_106_MSDC1_CLK_FUNC_MSDC1_CLK>;
- bias-pull-down;
- drive-strength = <MTK_DRIVE_4mA>;
- };
- };
-
- mmc1_pins_uhs: mmc1 {
- pins_cmd_dat {
- pinmux = <MT7623_PIN_107_MSDC1_DAT0_FUNC_MSDC1_DAT0>,
- <MT7623_PIN_108_MSDC1_DAT1_FUNC_MSDC1_DAT1>,
- <MT7623_PIN_109_MSDC1_DAT2_FUNC_MSDC1_DAT2>,
- <MT7623_PIN_110_MSDC1_DAT3_FUNC_MSDC1_DAT3>,
- <MT7623_PIN_105_MSDC1_CMD_FUNC_MSDC1_CMD>;
- input-enable;
- drive-strength = <MTK_DRIVE_4mA>;
- bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
- };
-
- pins_clk {
- pinmux = <MT7623_PIN_106_MSDC1_CLK_FUNC_MSDC1_CLK>;
- drive-strength = <MTK_DRIVE_4mA>;
- bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
- };
- };
-
- spi0_pins_a: spi@0 {
- pins_spi {
- pinmux = <MT7623_PIN_53_SPI0_CSN_FUNC_SPI0_CS>,
- <MT7623_PIN_54_SPI0_CK_FUNC_SPI0_CK>,
- <MT7623_PIN_55_SPI0_MI_FUNC_SPI0_MI>,
- <MT7623_PIN_56_SPI0_MO_FUNC_SPI0_MO>;
- bias-disable;
- };
- };
-
- pwm_pins_a: pwm@0 {
- pins_pwm {
- pinmux = <MT7623_PIN_203_PWM0_FUNC_PWM0>,
- <MT7623_PIN_204_PWM1_FUNC_PWM1>,
- <MT7623_PIN_205_PWM2_FUNC_PWM2>,
- <MT7623_PIN_206_PWM3_FUNC_PWM3>,
- <MT7623_PIN_207_PWM4_FUNC_PWM4>;
- };
- };
-
- uart0_pins_a: uart@0 {
- pins_dat {
- pinmux = <MT7623_PIN_79_URXD0_FUNC_URXD0>,
- <MT7623_PIN_80_UTXD0_FUNC_UTXD0>;
- };
- };
-
- uart1_pins_a: uart@1 {
- pins_dat {
- pinmux = <MT7623_PIN_81_URXD1_FUNC_URXD1>,
- <MT7623_PIN_82_UTXD1_FUNC_UTXD1>;
- };
- };
-};
-
-&pwm {
- pinctrl-names = "default";
- pinctrl-0 = <&pwm_pins_a>;
- status = "okay";
-};
-
-&pwrap {
- mt6323 {
- mt6323led: led {
- compatible = "mediatek,mt6323-led";
- #address-cells = <1>;
- #size-cells = <0>;
-
- led@0 {
- reg = <0>;
- label = "bpi-r2:isink:green";
- default-state = "off";
- };
- led@1 {
- reg = <1>;
- label = "bpi-r2:isink:red";
- default-state = "off";
- };
- led@2 {
- reg = <2>;
- label = "bpi-r2:isink:blue";
- default-state = "off";
- };
- };
- };
-};
-
-&spi0 {
- pinctrl-names = "default";
- pinctrl-0 = <&spi0_pins_a>;
- status = "okay";
-};
-
-&uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins_a>;
- status = "disabled";
-};
-
-&u3phy1 {
- status = "okay";
-};
-
-&u3phy2 {
- status = "okay";
-};
-
-&uart1 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart1_pins_a>;
- status = "disabled";
-};
-
-&uart2 {
- status = "okay";
-};
-
-&usb1 {
- vusb33-supply = <&mt6323_vusb_reg>;
- status = "okay";
-};
-
-&usb2 {
- vusb33-supply = <&mt6323_vusb_reg>;
- status = "okay";
-};